Fold the adjust_trampoline intrinsic into

[oota-llvm.git] / lib / Target / ARM / ARMISelLowering.h

diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 74790191d76d3ecac72c9b3e4c45537a5a79157d..ea2ab74375ae203726cd9df39fa5a598d73adee3 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -34,6 +34,7 @@ namespace llvm {
       WrapperJT,    // WrapperJT - A wrapper node for TargetJumpTable
       
       CALL,         // Function call.
+      CALL_PRED,    // Function call that's predicable.
       CALL_NOLINK,  // Function call with branch not branch-and-link.
       tCALL,        // Thumb function call.
       BRCOND,       // Conditional branch.
@@ -43,6 +44,7 @@ namespace llvm {
       PIC_ADD,      // Add with a PC operand and a PIC label.
 
       CMP,          // ARM compare instructions.
+      CMPNZ,        // ARM compare that uses only N or Z flags.
       CMPFP,        // ARM VFP compare instruction, sets FPSCR.
       CMPFPw0,      // ARM VFP compare against zero instruction, sets FPSCR.
       FMSTAT,       // ARM fmstat instruction.
@@ -62,7 +64,9 @@ namespace llvm {
       RRX,          // V = RRX X, Flag     -> srl X, 1 + shift in carry flag.
       
       FMRRD,        // double to two gprs.
-      FMDRR         // Two gprs to double.
+      FMDRR,         // Two gprs to double.
+
+      THREAD_POINTER
     };
   }
 
@@ -72,7 +76,7 @@ namespace llvm {
   class ARMTargetLowering : public TargetLowering {
     int VarArgsFrameIndex;            // FrameIndex for start of varargs area.
   public:
-    ARMTargetLowering(TargetMachine &TM);
+    explicit ARMTargetLowering(TargetMachine &TM);
 
     virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
     virtual const char *getTargetNodeName(unsigned Opcode) const;
@@ -80,32 +84,10 @@ namespace llvm {
     virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
                                                        MachineBasicBlock *MBB);
 
-    /// isLegalAddressImmediate - Return true if the integer value can be used
-    /// as the offset of the target addressing mode for load / store of the
-    /// given type.
-    virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const;
-
-    /// isLegalAddressImmediate - Return true if the GlobalValue can be used as
-    /// the offset of the target addressing mode.
-    virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
-
-    /// isLegalAddressScale - Return true if the integer value can be used as
-    /// the scale of the target addressing mode for load / store of the given
-    /// type.
-    virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
-
-    /// isLegalAddressScaleAndImm - Return true if S works for 
-    /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_ 
-    /// both can be applied simultaneously to the same instruction.
-    virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V, 
-                                           const Type *Ty) const;
-
-    /// isLegalAddressScaleAndImm - Return true if S works for 
-    /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
-    /// both can be applied simultaneously to the same instruction.
-    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
-                                           const Type *Ty) const;
-
+    /// isLegalAddressingMode - Return true if the addressing mode represented
+    /// by AM is legal for this target, for a load/store of the specified type.
+    virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const;
+    
     /// getPreIndexedAddressParts - returns true by value, base pointer and
     /// offset pointer and addressing mode by reference if the node's address
     /// can be legally represented as pre-indexed load / store address.
@@ -126,6 +108,7 @@ namespace llvm {
                                                 uint64_t Mask,
                                                 uint64_t &KnownZero, 
                                                 uint64_t &KnownOne,
+                                                const SelectionDAG &DAG,
                                                 unsigned Depth) const;
     ConstraintType getConstraintType(const std::string &Constraint) const;
     std::pair<unsigned, const TargetRegisterClass*> 
@@ -144,9 +127,17 @@ namespace llvm {
     unsigned ARMPCLabelIndex;
 
     SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG);
-    SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerGlobalAddressDarwin(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerGlobalAddressELF(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA,
+                                            SelectionDAG &DAG);
+    SDOperand LowerToTLSExecModels(GlobalAddressSDNode *GA,
+                                       SelectionDAG &DAG);
+    SDOperand LowerGLOBAL_OFFSET_TABLE(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
     SDOperand LowerBR_JT(SDOperand Op, SelectionDAG &DAG);
+    SDOperand LowerMEMCPY(SDOperand Op, SelectionDAG &DAG);
   };
 }