Updated VS build system. Patch provided by Cedric Venet:

[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.cpp

diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 4d1819de873a2f9bff1e876654d9af47a7916b84..94ca6b09fdeefe53b1ba62b141567bf17d4e15b9 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -141,6 +141,22 @@ unsigned ARMInstrInfo::isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) con
   return 0;
 }
 
+void ARMInstrInfo::reMaterialize(MachineBasicBlock &MBB,
+                                 MachineBasicBlock::iterator I,
+                                 unsigned DestReg,
+                                 const MachineInstr *Orig) const {
+  if (Orig->getOpcode() == ARM::MOVi2pieces) {
+    RI.emitLoadConstPool(MBB, I, DestReg, Orig->getOperand(1).getImm(),
+                         Orig->getOperand(2).getImm(),
+                         Orig->getOperand(3).getReg(), this, false);
+    return;
+  }
+
+  MachineInstr *MI = Orig->clone();
+  MI->getOperand(0).setReg(DestReg);
+  MBB.insert(I, MI);
+}
+
 static unsigned getUnindexedOpcode(unsigned Opc) {
   switch (Opc) {
   default: break;
@@ -282,7 +298,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = MI->getOperand(i);
     if (MO.isRegister() && MO.getReg() &&
-        MRegisterInfo::isVirtualRegister(MO.getReg())) {
+        TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
       unsigned Reg = MO.getReg();
       LiveVariables::VarInfo &VI = LV.getVarInfo(Reg);
       if (MO.isDef()) {
@@ -294,8 +310,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
         for (unsigned j = 0; j < 2; ++j) {
           // Look at the two new MI's in reverse order.
           MachineInstr *NewMI = NewMIs[j];
-          int NIdx = NewMI->findRegisterUseOperandIdx(Reg);
-          if (NIdx == -1)
+          if (!NewMI->readsRegister(Reg))
             continue;
           LV.addVirtualRegisterKilled(Reg, NewMI);
           if (VI.removeKill(MI))
@@ -862,8 +877,8 @@ static unsigned getNumJTEntries(const std::vector<MachineJumpTableEntry> &JT,
 
 /// GetInstSize - Return the size of the specified MachineInstr.
 ///
-unsigned ARM::GetInstSize(MachineInstr *MI) {
-  MachineBasicBlock &MBB = *MI->getParent();
+unsigned ARMInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
+  const MachineBasicBlock &MBB = *MI->getParent();
   const MachineFunction *MF = MBB.getParent();
   const TargetAsmInfo *TAI = MF->getTarget().getTargetAsmInfo();
 
@@ -878,6 +893,8 @@ unsigned ARM::GetInstSize(MachineInstr *MI) {
       return TAI->getInlineAsmLength(MI->getOperand(0).getSymbolName());
     if (MI->getOpcode() == ARM::LABEL)
       return 0;
+    if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF)
+      return 0;
     assert(0 && "Unknown or unset size field for instr!");
     break;
   case ARMII::Size8Bytes: return 8;          // Arm instruction x 2.
@@ -918,17 +935,5 @@ unsigned ARM::GetInstSize(MachineInstr *MI) {
     }
   }
   }
-}
-
-/// GetFunctionSize - Returns the size of the specified MachineFunction.
-///
-unsigned ARM::GetFunctionSize(MachineFunction &MF) {
-  unsigned FnSize = 0;
-  for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
-       MBBI != E; ++MBBI) {
-    MachineBasicBlock &MBB = *MBBI;
-    for (MachineBasicBlock::iterator I = MBB.begin(),E = MBB.end(); I != E; ++I)
-      FnSize += ARM::GetInstSize(I);
-  }
-  return FnSize;
+  return 0; // Not reached
 }