//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the "Instituto Nokia de Tecnologia" and
-// is distributed under the University of Illinois Open Source
+// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
FormShift = 13,
FormMask = 31 << FormShift,
-// Pseudo instructions
+ // Pseudo instructions
Pseudo = 1 << FormShift,
-// Multiply instructions
+ // Multiply instructions
MulFrm = 2 << FormShift,
-
-// Branch instructions
- Branch = 3 << FormShift,
- BranchMisc = 4 << FormShift,
-
-// Data Processing instructions
- DPRdIm = 5 << FormShift,
- DPRdReg = 6 << FormShift,
- DPRdSoReg = 7 << FormShift,
- DPRdMisc = 8 << FormShift,
-
- DPRnIm = 9 << FormShift,
- DPRnReg = 10 << FormShift,
- DPRnSoReg = 11 << FormShift,
-
- DPRIm = 12 << FormShift,
- DPRReg = 13 << FormShift,
- DPRSoReg = 14 << FormShift,
-
- DPRImS = 15 << FormShift,
- DPRRegS = 16 << FormShift,
- DPRSoRegS = 17 << FormShift,
-
-// Load and Store
- LdFrm = 18 << FormShift,
- StFrm = 19 << FormShift,
-
-// Miscellaneous arithmetic instructions
- ArithMisc = 20 << FormShift,
-
-// Thumb format
- ThumbFrm = 21 << FormShift,
-
-// VFP format
- VPFFrm = 22 << FormShift
-
-
+ MulSMLAW = 3 << FormShift,
+ MulSMULW = 4 << FormShift,
+ MulSMLA = 5 << FormShift,
+ MulSMUL = 6 << FormShift,
+
+ // Branch instructions
+ Branch = 7 << FormShift,
+ BranchMisc = 8 << FormShift,
+
+ // Data Processing instructions
+ DPRdIm = 9 << FormShift,
+ DPRdReg = 10 << FormShift,
+ DPRdSoReg = 11 << FormShift,
+ DPRdMisc = 12 << FormShift,
+
+ DPRnIm = 13 << FormShift,
+ DPRnReg = 14 << FormShift,
+ DPRnSoReg = 15 << FormShift,
+
+ DPRIm = 16 << FormShift,
+ DPRReg = 17 << FormShift,
+ DPRSoReg = 18 << FormShift,
+
+ DPRImS = 19 << FormShift,
+ DPRRegS = 20 << FormShift,
+ DPRSoRegS = 21 << FormShift,
+
+ // Load and Store
+ LdFrm = 22 << FormShift,
+ StFrm = 23 << FormShift,
+
+ // Miscellaneous arithmetic instructions
+ ArithMisc = 24 << FormShift,
+
+ // Thumb format
+ ThumbFrm = 25 << FormShift,
+
+ // VFP format
+ VPFFrm = 26 << FormShift,
+
+ // Field shifts - such shifts are used to set field while generating
+ // machine instructions.
+ RegRsShift = 8,
+ RegRdShift = 12,
+ RegRnShift = 16,
+ L_BitShift = 20,
+ S_BitShift = 20,
+ U_BitShift = 23,
+ IndexShift = 24,
+ I_BitShift = 25
};
}
-class ARMInstrInfo : public TargetInstrInfo {
+class ARMInstrInfo : public TargetInstrInfoImpl {
const ARMRegisterInfo RI;
public:
- ARMInstrInfo(const ARMSubtarget &STI);
+ explicit ARMInstrInfo(const ARMSubtarget &STI);
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).
///
- virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
+ virtual const ARMRegisterInfo &getRegisterInfo() const { return RI; }
/// getPointerRegClass - Return the register class to use to hold pointers.
/// This is used for addressing modes.
virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
+ unsigned DestReg, const MachineInstr *Orig) const;
+
virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
MachineBasicBlock::iterator &MBBI,
LiveVariables &LV) const;
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
const std::vector<MachineOperand> &Cond) const;
+ virtual void copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator I,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *DestRC,
+ const TargetRegisterClass *SrcRC) const;
+ virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned SrcReg, bool isKill, int FrameIndex,
+ const TargetRegisterClass *RC) const;
+
+ virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
+ SmallVectorImpl<MachineOperand> &Addr,
+ const TargetRegisterClass *RC,
+ SmallVectorImpl<MachineInstr*> &NewMIs) const;
+
+ virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, int FrameIndex,
+ const TargetRegisterClass *RC) const;
+
+ virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
+ SmallVectorImpl<MachineOperand> &Addr,
+ const TargetRegisterClass *RC,
+ SmallVectorImpl<MachineInstr*> &NewMIs) const;
+ virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ const std::vector<CalleeSavedInfo> &CSI) const;
+ virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ const std::vector<CalleeSavedInfo> &CSI) const;
+
+ virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
+ MachineInstr* MI,
+ SmallVectorImpl<unsigned> &Ops,
+ int FrameIndex) const;
+
+ virtual MachineInstr* foldMemoryOperand(MachineFunction &MF,
+ MachineInstr* MI,
+ SmallVectorImpl<unsigned> &Ops,
+ MachineInstr* LoadMI) const {
+ return 0;
+ }
+
+ virtual bool canFoldMemoryOperand(MachineInstr *MI,
+ SmallVectorImpl<unsigned> &Ops) const;
+
virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
virtual
bool SubsumesPredicate(const std::vector<MachineOperand> &Pred1,
- const std::vector<MachineOperand> &Pred1) const;
+ const std::vector<MachineOperand> &Pred2) const;
virtual bool DefinesPredicate(MachineInstr *MI,
std::vector<MachineOperand> &Pred) const;
+
+ /// GetInstSize - Returns the size of the specified MachineInstr.
+ ///
+ virtual unsigned GetInstSizeInBytes(const MachineInstr* MI) const;
};
- // Utility routines
- namespace ARM {
- /// GetInstSize - Returns the size of the specified MachineInstr.
- ///
- unsigned GetInstSize(MachineInstr *MI);
-
- /// GetFunctionSize - Returns the size of the specified MachineFunction.
- ///
- unsigned GetFunctionSize(MachineFunction &MF);
- }
}
#endif
projects / oota-llvm.git / blobdiff