Updated VS build system. Patch provided by Cedric Venet:

[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index c9b11419f2a9a2b43691e01909630e91c77303c7..34487ff5ef113d9f0af57236cf9027d7fb6d8c22 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -46,9 +46,9 @@ def ARMWrapper       : SDNode<"ARMISD::Wrapper",     SDTIntUnaryOp>;
 def ARMWrapperJT     : SDNode<"ARMISD::WrapperJT",   SDTIntBinOp>;
 
 def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeqStart,
-                             [SDNPHasChain, SDNPOutFlag]>;
+                              [SDNPHasChain, SDNPOutFlag]>;
 def ARMcallseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_ARMCallSeqEnd,
-                             [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
+                              [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
 def ARMcall          : SDNode<"ARMISD::CALL", SDT_ARMcall,
                               [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
@@ -57,7 +57,7 @@ def ARMcall_pred    : SDNode<"ARMISD::CALL_PRED", SDT_ARMcall,
 def ARMcall_nolink   : SDNode<"ARMISD::CALL_NOLINK", SDT_ARMcall,
                               [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
 
-def ARMretflag       : SDNode<"ARMISD::RET_FLAG", SDTRet,
+def ARMretflag       : SDNode<"ARMISD::RET_FLAG", SDTNone,
                               [SDNPHasChain, SDNPOptInFlag]>;
 
 def ARMcmov          : SDNode<"ARMISD::CMOV", SDT_ARMCMov,
@@ -645,12 +645,6 @@ multiclass AsXI1_bin_c_irs<bits<4> opcod, string opc, PatFrag opnode> {
 //===----------------------------------------------------------------------===//
 //  Miscellaneous Instructions.
 //
-let isImplicitDef = 1 in
-def IMPLICIT_DEF_GPR : 
-PseudoInst<(outs GPR:$rD), (ins pred:$p),
-           "@ IMPLICIT_DEF_GPR $rD",
-           [(set GPR:$rD, (undef))]>;
-
 
 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool in
 /// the function.  The first operand is the ID# for this instruction, the second
@@ -809,7 +803,7 @@ def LDR  : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
                [(set GPR:$dst, (load addrmode2:$addr))]>;
 
 // Special LDR for loads from non-pc-relative constpools.
-let isSimpleLoad = 1, isReMaterializable = 1 in
+let isSimpleLoad = 1, mayLoad = 1, isReMaterializable = 1 in
 def LDRcp : AI2<0x0, (outs GPR:$dst), (ins addrmode2:$addr), LdFrm,
                  "ldr", " $dst, $addr", []>;
 
@@ -831,6 +825,7 @@ def LDRSB : AI3<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
                  "ldr", "sb $dst, $addr",
                 [(set GPR:$dst, (sextloadi8 addrmode3:$addr))]>;
 
+let mayLoad = 1 in {
 // Load doubleword
 def LDRD  : AI3<0xD, (outs GPR:$dst), (ins addrmode3:$addr), LdFrm,
                  "ldr", "d $dst, $addr",
@@ -876,6 +871,7 @@ def LDRSB_PRE : AI3pr<0xD, (outs GPR:$dst, GPR:$base_wb),
 def LDRSB_POST: AI3po<0xD, (outs GPR:$dst, GPR:$base_wb),
                       (ins GPR:$base,am3offset:$offset), LdFrm,
                       "ldr", "sb $dst, [$base], $offset", "$base = $base_wb", []>;
+}
 
 // Store
 def STR  : AI2<0x0, (outs), (ins GPR:$src, addrmode2:$addr), StFrm,
@@ -939,6 +935,7 @@ def STRB_POST: AI2po<0x1, (outs GPR:$base_wb),
 //
 
 // FIXME: $dst1 should be a def.
+let mayLoad = 1 in
 def LDM : AXI4<0x0, (outs),
                (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
@@ -1401,14 +1398,6 @@ def : ARMPat<(extloadi1  addrmode2:$addr),  (LDRB addrmode2:$addr)>;
 def : ARMPat<(extloadi8  addrmode2:$addr),  (LDRB addrmode2:$addr)>;
 def : ARMPat<(extloadi16 addrmode3:$addr),  (LDRH addrmode3:$addr)>;
 
-// truncstore i1 -> truncstore i8
-def : ARMPat<(truncstorei1 GPR:$src, addrmode2:$dst), 
-             (STRB GPR:$src, addrmode2:$dst)>;
-def : ARMPat<(pre_truncsti1 GPR:$src, GPR:$base, am2offset:$offset), 
-             (STRB_PRE GPR:$src, GPR:$base, am2offset:$offset)>;
-def : ARMPat<(post_truncsti1 GPR:$src, GPR:$base, am2offset:$offset), 
-             (STRB_POST GPR:$src, GPR:$base, am2offset:$offset)>;
-
 // smul* and smla*
 def : ARMV5TEPat<(mul (sra (shl GPR:$a, 16), 16), (sra (shl GPR:$b, 16), 16)),
                  (SMULBB GPR:$a, GPR:$b)>;