MC/ARM: Add an ARMOperand class for condition codes.

[oota-llvm.git] / lib / Target / ARM / ARMRegisterInfo.h

diff --git a/lib/Target/ARM/ARMRegisterInfo.h b/lib/Target/ARM/ARMRegisterInfo.h
index f13c7d4acceb7ca3a3642aebafb8b0b4e58bd234..8edfb9a2057fc4886eac7593ac828cd78fdc1d8b 100644 (file)
--- a/lib/Target/ARM/ARMRegisterInfo.h
+++ b/lib/Target/ARM/ARMRegisterInfo.h
@@ -23,17 +23,6 @@ namespace llvm {
   class ARMBaseInstrInfo;
   class Type;
 
-namespace ARM {
-  /// SubregIndex - The index of various subregister classes. Note that 
-  /// these indices must be kept in sync with the class indices in the 
-  /// ARMRegisterInfo.td file.
-  enum SubregIndex {
-    SSUBREG_0 = 1, SSUBREG_1 = 2, SSUBREG_2 = 3, SSUBREG_3 = 4,
-    DSUBREG_0 = 5, DSUBREG_1 = 6, DSUBREG_2 = 7, DSUBREG_3 = 8,
-    QSUBREG_0 = 9, QSUBREG_1 = 10
-  };
-}
-
 struct ARMRegisterInfo : public ARMBaseRegisterInfo {
 public:
   ARMRegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);