//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the "Instituto Nokia de Tecnologia" and
-// is distributed under the University of Illinois Open Source
+// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
#include "ARMTargetMachine.h"
-#include "ARMTargetAsmInfo.h"
+#include "ARMMCAsmInfo.h"
#include "ARMFrameInfo.h"
#include "ARM.h"
-#include "llvm/Module.h"
#include "llvm/PassManager.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
-#include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetOptions.h"
+#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
-static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
- cl::desc("Disable load store optimization pass"));
+static const MCAsmInfo *createMCAsmInfo(const Target &T,
+ const StringRef &TT) {
+ Triple TheTriple(TT);
+ switch (TheTriple.getOS()) {
+ case Triple::Darwin:
+ return new ARMMCAsmInfoDarwin();
+ default:
+ return new ARMELFMCAsmInfo();
+ }
+}
+
-namespace {
+extern "C" void LLVMInitializeARMTarget() {
// Register the target.
- RegisterTarget<ARMTargetMachine> X("arm", " ARM");
+ RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
+ RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
+
+ // Register the target asm info.
+ RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
+ RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
}
-/// TargetMachine ctor - Create an ILP32 architecture model
+/// TargetMachine ctor - Create an ARM architecture model.
///
-ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
- : Subtarget(M, FS),
- DataLayout(Subtarget.isAPCS_ABI() ?
- // APCS ABI
- (Subtarget.isThumb() ?
- std::string("e-p:32:32-f64:32:32-i64:32:32-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:32:32-i64:32:32")) :
- // AAPCS ABI
- (Subtarget.isThumb() ?
- std::string("e-p:32:32-f64:64:64-i64:64:64-"
- "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
- std::string("e-p:32:32-f64:64:64-i64:64:64"))),
- InstrInfo(Subtarget),
- FrameInfo(Subtarget) {}
-
-unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
- std::string TT = M.getTargetTriple();
- if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
- return 20;
-
- if (M.getPointerSize() == Module::Pointer32)
- return 1;
- else
- return 0;
+ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
+ const std::string &TT,
+ const std::string &FS,
+ bool isThumb)
+ : LLVMTargetMachine(T, TT),
+ Subtarget(TT, FS, isThumb),
+ FrameInfo(Subtarget),
+ JITInfo(),
+ InstrItins(Subtarget.getInstrItineraryData()) {
+ DefRelocModel = getRelocationModel();
}
+ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64")),
+ TLInfo(*this) {
+}
-const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
- return new ARMTargetAsmInfo(*this);
+ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
+ const std::string &FS)
+ : ARMBaseTargetMachine(T, TT, FS, true),
+ InstrInfo(Subtarget.hasThumb2()
+ ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
+ : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
+ DataLayout(Subtarget.isAPCS_ABI() ?
+ std::string("e-p:32:32-f64:32:32-i64:32:32-"
+ "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
+ std::string("e-p:32:32-f64:64:64-i64:64:64-"
+ "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
+ TLInfo(*this) {
}
+
// Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
- PM.add(createARMISelDag(*this));
+bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ PM.add(createARMISelDag(*this, OptLevel));
return false;
}
-bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
- // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
- if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
+bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ if (Subtarget.hasNEON())
+ PM.add(createNEONPreAllocPass());
+
+ // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+ if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
+ PM.add(createARMLoadStoreOptimizationPass(true));
+ return true;
+}
+
+bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+ if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
PM.add(createARMLoadStoreOptimizationPass());
-
+
+ return true;
+}
+
+bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
+ // FIXME: temporarily disabling load / store optimization pass for Thumb1.
+ if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
+ PM.add(createIfConverterPass());
+
+ if (Subtarget.isThumb2()) {
+ PM.add(createThumb2ITBlockPass());
+ PM.add(createThumb2SizeReductionPass());
+ }
+
PM.add(createARMConstantIslandPass());
return true;
}
-bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
- std::ostream &Out) {
- // Output assembly language.
- PM.add(createARMCodePrinterPass(Out, *this));
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ MachineCodeEmitter &MCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+
+ // Machine code emitter pass for ARM.
+ PM.add(createARMCodeEmitterPass(*this, MCE));
return false;
}
+
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+
+ // Machine code emitter pass for ARM.
+ PM.add(createARMJITCodeEmitterPass(*this, JCE));
+ return false;
+}
+
+bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ ObjectCodeEmitter &OCE) {
+ // FIXME: Move this to TargetJITInfo!
+ if (DefRelocModel == Reloc::Default)
+ setRelocationModel(Reloc::Static);
+
+ // Machine code emitter pass for ARM.
+ PM.add(createARMObjectCodeEmitterPass(*this, OCE));
+ return false;
+}
+
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ MachineCodeEmitter &MCE) {
+ // Machine code emitter pass for ARM.
+ PM.add(createARMCodeEmitterPass(*this, MCE));
+ return false;
+}
+
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ JITCodeEmitter &JCE) {
+ // Machine code emitter pass for ARM.
+ PM.add(createARMJITCodeEmitterPass(*this, JCE));
+ return false;
+}
+
+bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
+ ObjectCodeEmitter &OCE) {
+ // Machine code emitter pass for ARM.
+ PM.add(createARMObjectCodeEmitterPass(*this, OCE));
+ return false;
+}
+
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