Updated VS build system. Patch provided by Cedric Venet:

[oota-llvm.git] / lib / Target / ARM / ARMTargetMachine.cpp

diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp
index 57b644026db9ce6d34fd2bcf1d5e1dde4b4381fb..913ebe0fa5e936c595df425f7fa1c61f1f1d574b 100644 (file)
--- a/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/lib/Target/ARM/ARMTargetMachine.cpp
@@ -2,8 +2,7 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the "Instituto Nokia de Tecnologia" and
-// is distributed under the University of Illinois Open Source
+// This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
@@ -25,23 +24,38 @@ using namespace llvm;
 
 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
                               cl::desc("Disable load store optimization pass"));
-static cl::opt<bool> EnableIfConversion("enable-arm-if-conversion", cl::Hidden,
-                              cl::desc("Enable if-conversion pass"));
+static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
+                              cl::desc("Disable if-conversion pass"));
 
-namespace {
-  // Register the target.
-  RegisterTarget<ARMTargetMachine>   X("arm",   "  ARM");
-  RegisterTarget<ThumbTargetMachine> Y("thumb", "  Thumb");
-}
+// Register the target.
+static RegisterTarget<ARMTargetMachine>   X("arm",   "  ARM");
+static RegisterTarget<ThumbTargetMachine> Y("thumb", "  Thumb");
 
 /// ThumbTargetMachine - Create an Thumb architecture model.
 ///
+unsigned ThumbTargetMachine::getJITMatchQuality() {
+#if defined(__thumb__)
+  return 10;
+#endif
+  return 0;
+}
+
 unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
   std::string TT = M.getTargetTriple();
   if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "thumb-")
     return 20;
 
-  return M.getPointerSize() == Module::Pointer32;
+  // If the target triple is something non-thumb, we don't match.
+  if (!TT.empty()) return 0;
+
+  if (M.getEndianness()  == Module::LittleEndian &&
+      M.getPointerSize() == Module::Pointer32)
+    return 10;                                   // Weak match
+  else if (M.getEndianness() != Module::AnyEndianness ||
+           M.getPointerSize() != Module::AnyPointerSize)
+    return 0;                                    // Match for some other target
+
+  return getJITMatchQuality()/2;
 }
 
 ThumbTargetMachine::ThumbTargetMachine(const Module &M, const std::string &FS) 
@@ -66,14 +80,32 @@ ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS,
            std::string("e-p:32:32-f64:64:64-i64:64:64"))),
     InstrInfo(Subtarget),
     FrameInfo(Subtarget),
+    JITInfo(*this),
     TLInfo(*this) {}
 
+unsigned ARMTargetMachine::getJITMatchQuality() {
+#if defined(__arm__)
+  return 10;
+#endif
+  return 0;
+}
+
 unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
   std::string TT = M.getTargetTriple();
-  if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
+  if (TT.size() >= 4 && // Match arm-foo-bar, as well as things like armv5blah-*
+      (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
     return 20;
+  // If the target triple is something non-arm, we don't match.
+  if (!TT.empty()) return 0;
+
+  if (M.getEndianness()  == Module::LittleEndian &&
+      M.getPointerSize() == Module::Pointer32)
+    return 10;                                   // Weak match
+  else if (M.getEndianness() != Module::AnyEndianness ||
+           M.getPointerSize() != Module::AnyPointerSize)
+    return 0;                                    // Match for some other target
 
-  return M.getPointerSize() == Module::Pointer32;
+  return getJITMatchQuality()/2;
 }
 
 
@@ -83,31 +115,48 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
 
 
 // Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createARMISelDag(*this));
   return false;
 }
 
-bool ARMTargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
-  if (Fast || !EnableIfConversion || Subtarget.isThumb())
-    return false;
-
-  PM.add(createIfConverterPass());
-  return true;
-}
-
-bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
   if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
     PM.add(createARMLoadStoreOptimizationPass());
   
+  if (!Fast && !DisableIfConversion && !Subtarget.isThumb())
+    PM.add(createIfConverterPass());
+
   PM.add(createARMConstantIslandPass());
   return true;
 }
 
-bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   // Output assembly language.
   PM.add(createARMCodePrinterPass(Out, *this));
   return false;
 }
+
+
+bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+                                      bool DumpAsm, MachineCodeEmitter &MCE) {
+  // FIXME: Move this to TargetJITInfo!
+  setRelocationModel(Reloc::Static);
+
+  // Machine code emitter pass for ARM.
+  PM.add(createARMCodeEmitterPass(*this, MCE));
+  if (DumpAsm)
+    PM.add(createARMCodePrinterPass(*cerr.stream(), *this));
+  return false;
+}
+
+bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
+                                        bool DumpAsm, MachineCodeEmitter &MCE) {
+  // Machine code emitter pass for ARM.
+  PM.add(createARMCodeEmitterPass(*this, MCE));
+  if (DumpAsm)
+    PM.add(createARMCodePrinterPass(*cerr.stream(), *this));
+  return false;
+}