//===----------------------------------------------------------------------===//
#include "MCTargetDesc/ARMFixupKinds.h"
+#include "llvm/ADT/Twine.h"
+#include "llvm/MC/MCAsmBackend.h"
#include "llvm/MC/MCFixup.h"
+#include "llvm/MC/MCFixupKindInfo.h"
#include "llvm/MC/MCValue.h"
#include "llvm/MC/MCWinCOFFObjectWriter.h"
#include "llvm/Support/COFF.h"
virtual ~ARMWinCOFFObjectWriter() { }
unsigned getRelocType(const MCValue &Target, const MCFixup &Fixup,
- bool IsCrossSection) const override;
+ bool IsCrossSection,
+ const MCAsmBackend &MAB) const override;
+
+ bool recordRelocation(const MCFixup &) const override;
};
unsigned ARMWinCOFFObjectWriter::getRelocType(const MCValue &Target,
const MCFixup &Fixup,
- bool IsCrossSection) const {
+ bool IsCrossSection,
+ const MCAsmBackend &MAB) const {
assert(getMachine() == COFF::IMAGE_FILE_MACHINE_ARMNT &&
"AArch64 support not yet implemented");
Target.isAbsolute() ? MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
switch (static_cast<unsigned>(Fixup.getKind())) {
- default: llvm_unreachable("unsupported relocation type");
+ default: {
+ const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind());
+ report_fatal_error(Twine("unsupported relocation type: ") + Info.Name);
+ }
case FK_Data_4:
switch (Modifier) {
case MCSymbolRefExpr::VK_COFF_IMGREL32:
default:
return COFF::IMAGE_REL_ARM_ADDR32;
}
+ case FK_SecRel_2:
+ return COFF::IMAGE_REL_ARM_SECTION;
+ case FK_SecRel_4:
+ return COFF::IMAGE_REL_ARM_SECREL;
case ARM::fixup_t2_condbranch:
return COFF::IMAGE_REL_ARM_BRANCH20T;
case ARM::fixup_t2_uncondbranch:
case ARM::fixup_arm_thumb_blx:
return COFF::IMAGE_REL_ARM_BLX23T;
case ARM::fixup_t2_movw_lo16:
- return COFF::IMAGE_REL_ARM_MOV32T;
case ARM::fixup_t2_movt_hi16:
- llvm_unreachable("High-word for pair-wise relocations are contiguously "
- "addressed as an IMAGE_REL_ARM_MOV32T relocation");
+ return COFF::IMAGE_REL_ARM_MOV32T;
}
}
+
+bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const {
+ return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16;
+}
}
namespace llvm {