/// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
///
- int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
+ unsigned getMachineOpValue(const MachineInstr &MI,
+ const MachineOperand &MO);
public:
static char ID;
explicit AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce)
- : MachineFunctionPass((intptr_t)&ID), II(0), TM(tm), MCE(mce) {}
+ : MachineFunctionPass(&ID), II(0), TM(tm), MCE(mce) {}
AlphaCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce,
const AlphaInstrInfo& ii)
- : MachineFunctionPass((intptr_t)&ID), II(&ii), TM(tm), MCE(mce) {}
+ : MachineFunctionPass(&ID), II(&ii), TM(tm), MCE(mce) {}
bool runOnMachineFunction(MachineFunction &MF);
/// CodeEmitterGenerator using TableGen, produces the binary encoding for
/// machine instructions.
///
- unsigned getBinaryCodeForInstr(MachineInstr &MI);
+ unsigned getBinaryCodeForInstr(const MachineInstr &MI);
private:
void emitBasicBlock(MachineBasicBlock &MBB);
MCE.StartMachineBasicBlock(&MBB);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
I != E; ++I) {
- MachineInstr &MI = *I;
+ const MachineInstr &MI = *I;
switch(MI.getOpcode()) {
default:
MCE.emitWordLE(getBinaryCodeForInstr(*I));
case Alpha::ALTENT:
case Alpha::PCLABEL:
case Alpha::MEMLABEL:
- case Alpha::IDEF_I:
- case Alpha::IDEF_F32:
- case Alpha::IDEF_F64:
+ case TargetInstrInfo::IMPLICIT_DEF:
break; //skip these
}
}
}
}
-int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
+unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
+ const MachineOperand &MO) {
- int rv = 0; // Return value; defaults to 0 for unhandled cases
- // or things that get fixed up later by the JIT.
+ unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
+ // or things that get fixed up later by the JIT.
- if (MO.isRegister()) {
+ if (MO.isReg()) {
rv = getAlphaRegNumber(MO.getReg());
- } else if (MO.isImmediate()) {
- rv = MO.getImmedValue();
- } else if (MO.isGlobalAddress() || MO.isExternalSymbol()
- || MO.isConstantPoolIndex()) {
+ } else if (MO.isImm()) {
+ rv = MO.getImm();
+ } else if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
DOUT << MO << " is a relocated op for " << MI << "\n";
unsigned Reloc = 0;
int Offset = 0;
case Alpha::LDAg:
case Alpha::LDAHg:
Reloc = Alpha::reloc_gpdist;
- Offset = MI.getOperand(3).getImmedValue();
+ Offset = MI.getOperand(3).getImm();
break;
default:
assert(0 && "unknown relocatable instruction");
abort();
}
- if (MO.isGlobalAddress())
+ if (MO.isGlobal())
MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
- Reloc, MO.getGlobal(), Offset,
- false, useGOT));
- else if (MO.isExternalSymbol())
+ Reloc, MO.getGlobal(), Offset,
+ isa<Function>(MO.getGlobal()),
+ useGOT));
+ else if (MO.isSymbol())
MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
- Reloc, MO.getSymbolName(), Offset,
- true));
+ Reloc, MO.getSymbolName(),
+ Offset, true));
else
- MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
- Reloc, MO.getConstantPoolIndex(),
- Offset));
- } else if (MO.isMachineBasicBlock()) {
+ MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
+ Reloc, MO.getIndex(), Offset));
+ } else if (MO.isMBB()) {
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
- Alpha::reloc_bsr,
- MO.getMachineBasicBlock()));
+ Alpha::reloc_bsr, MO.getMBB()));
}else {
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
abort();