clean this function up some

[oota-llvm.git] / lib / Target / Alpha / AlphaISelDAGToDAG.cpp

diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 5fadc81ce84720421ef0d0741695d7f1f2e5427a..dd29e912529bc67bf98c434986236b9d7396b8fb 100644 (file)
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -38,13 +38,14 @@ namespace {
   class AlphaDAGToDAGISel : public SelectionDAGISel {
     AlphaTargetLowering AlphaLowering;
 
-    static const int IMM_LOW  = -32768;
-    static const int IMM_HIGH = 32767;
-    static const int IMM_MULT = 65536;
+    static const int64_t IMM_LOW  = -32768;
+    static const int64_t IMM_HIGH = 32767;
+    static const int64_t IMM_MULT = 65536;
     
   public:
     AlphaDAGToDAGISel(TargetMachine &TM)
-      : SelectionDAGISel(AlphaLowering), AlphaLowering(TM) {}
+      : SelectionDAGISel(AlphaLowering), AlphaLowering(TM) 
+    {}
 
     /// getI64Imm - Return a target constant with the specified value, of type
     /// i64.
@@ -194,9 +195,6 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
                                 CurDAG->getBasicBlock(Dest), Chain);
   }
 
-  case ISD::BR: 
-    return CurDAG->SelectNodeTo(N, Alpha::BR_DAG, MVT::Other, N->getOperand(1),
-                                Select(N->getOperand(0)));
   case ISD::FrameIndex: {
     int FI = cast<FrameIndexSDNode>(N)->getIndex();
     return CurDAG->SelectNodeTo(N, Alpha::LDA, MVT::i64,
@@ -214,7 +212,7 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
                                 Chain.getValue(1));
     Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Select(Op.getOperand(0)), 
                                 Chain.getValue(1));
-    Chain = CurDAG->getTargetNode(Alpha::JSRsDAG, MVT::Other, MVT::Flag, 
+    Chain = CurDAG->getTargetNode(Alpha::JSRs, MVT::Other, MVT::Flag, 
                                  Chain, Chain.getValue(1));
     Chain = CurDAG->getCopyFromReg(Chain, Alpha::R27, MVT::i64, 
                                  Chain.getValue(1));
@@ -243,17 +241,24 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
     return CurDAG->SelectNodeTo(N, Alpha::RETDAG, MVT::Other, Chain, InFlag);
   }
   case ISD::Constant: {
-    int64_t val = (int64_t)cast<ConstantSDNode>(N)->getValue();
-    if (val > (int64_t)IMM_HIGH +(int64_t)IMM_HIGH* (int64_t)IMM_MULT ||
-        val < (int64_t)IMM_LOW + (int64_t)IMM_LOW * (int64_t)IMM_MULT) {
-      MachineConstantPool *CP = BB->getParent()->getConstantPool();
-      ConstantUInt *C =
-        ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , val);
-      SDOperand Tmp, CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
-      Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI, getGlobalBaseReg());
-      return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, CPI, Tmp);
-    }
-    break;
+    uint64_t uval = cast<ConstantSDNode>(N)->getValue();
+    int64_t val = (int64_t)uval;
+    int32_t val32 = (int32_t)val;
+    if (val <= IMM_HIGH + IMM_HIGH * IMM_MULT &&
+       val >= IMM_LOW  + IMM_LOW  * IMM_MULT)
+      break; //(LDAH (LDA))
+    if ((uval >> 32) == 0 && //empty upper bits
+       val32 <= IMM_HIGH + IMM_HIGH * IMM_MULT &&
+       val32 >= IMM_LOW  + IMM_LOW  * IMM_MULT)
+      break; //(zext (LDAH (LDA)))
+    //Else use the constant pool
+    MachineConstantPool *CP = BB->getParent()->getConstantPool();
+    ConstantUInt *C =
+      ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , uval);
+    SDOperand Tmp, CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
+    Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI, getGlobalBaseReg());
+    return CurDAG->SelectNodeTo(N, Alpha::LDQr, MVT::i64, MVT::Other, 
+                               CPI, Tmp, CurDAG->getEntryNode());
   }
   case ISD::ConstantFP:
     if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) {
@@ -359,7 +364,7 @@ SDOperand AlphaDAGToDAGISel::SelectCALL(SDOperand Op) {
 
   SDNode *N = Op.Val;
   SDOperand Chain = Select(N->getOperand(0));
-  SDOperand Addr = Select(N->getOperand(1));
+  SDOperand Addr = N->getOperand(1);
   SDOperand InFlag;  // Null incoming flag value.
 
    std::vector<SDOperand> CallOperands;
@@ -404,12 +409,20 @@ SDOperand AlphaDAGToDAGISel::SelectCALL(SDOperand Op) {
    }
 
 
-   Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Addr, InFlag);
-   InFlag = Chain.getValue(1);
    // Finally, once everything is in registers to pass to the call, emit the
    // call itself.
-   Chain = CurDAG->getTargetNode(Alpha::JSRDAG, MVT::Other, MVT::Flag, 
-                                 Chain, InFlag );
+   if (Addr.getOpcode() == AlphaISD::GPRelLo) {
+     SDOperand GOT = getGlobalBaseReg();
+     Chain = CurDAG->getCopyToReg(Chain, Alpha::R29, GOT, InFlag);
+     InFlag = Chain.getValue(1);
+     Chain = CurDAG->getTargetNode(Alpha::BSR, MVT::Other, MVT::Flag, 
+                                  Addr.getOperand(0), Chain, InFlag);
+   } else {
+     Chain = CurDAG->getCopyToReg(Chain, Alpha::R27, Select(Addr), InFlag);
+     InFlag = Chain.getValue(1);
+     Chain = CurDAG->getTargetNode(Alpha::JSR, MVT::Other, MVT::Flag, 
+                                  Chain, InFlag );
+   }
    InFlag = Chain.getValue(1);
 
    std::vector<SDOperand> CallResults;