// Set up the TargetLowering object.
//I am having problems with shr n ubyte 1
setShiftAmountType(MVT::i64);
- setSetCCResultContents(ZeroOrOneSetCCResult);
+ setBooleanContents(ZeroOrOneBooleanContent);
setUsesGlobalOffsetTable(true);
setOperationAction(ISD::SUBE , MVT::i64, Expand);
setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
+ setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
// We don't support sin/cos/sqrt/pow
computeRegisterProperties();
}
-MVT AlphaTargetLowering::getSetCCResultType(const SDValue &) const {
+MVT AlphaTargetLowering::getSetCCResultType(MVT VT) const {
return MVT::i64;
}
ArgValues.push_back(Root);
// Return the new list of results.
- return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
- ArgValues.size());
+ return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
+ &ArgValues[0], ArgValues.size());
}
static SDValue LowerRET(SDValue Op, SelectionDAG &DAG) {
bool RetSExt, bool RetZExt, bool isVarArg,
bool isInreg, unsigned CallingConv,
bool isTailCall, SDValue Callee,
- ArgListTy &Args, SelectionDAG &DAG) {
+ ArgListTy &Args, SelectionDAG &DAG,
+ DebugLoc dl) {
int NumBytes = 0;
if (Args.size() > 6)
NumBytes = (Args.size() - 6) * 8;
// Promote the integer to 64 bits. If the input type is signed use a
// sign extend, otherwise use a zero extend.
if (Args[i].isSExt)
- Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].Node);
+ Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, dl,
+ MVT::i64, Args[i].Node);
else if (Args[i].isZExt)
- Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node);
+ Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, dl,
+ MVT::i64, Args[i].Node);
else
- Args[i].Node = DAG.getNode(ISD::ANY_EXTEND, MVT::i64, Args[i].Node);
+ Args[i].Node = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i64, Args[i].Node);
break;
case MVT::i64:
case MVT::f64:
Ops.push_back(Chain);
Ops.push_back(Callee);
Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end());
- SDValue TheCall = DAG.getNode(AlphaISD::CALL, RetVals, &Ops[0], Ops.size());
+ SDValue TheCall = DAG.getNode(AlphaISD::CALL, dl,
+ RetVals, &Ops[0], Ops.size());
Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
DAG.getIntPtrConstant(0, true), SDValue());
AssertKind = ISD::AssertZext;
if (AssertKind != ISD::DELETED_NODE)
- RetVal = DAG.getNode(AssertKind, MVT::i64, RetVal,
+ RetVal = DAG.getNode(AssertKind, dl, MVT::i64, RetVal,
DAG.getValueType(RetTyVT));
- RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
+ RetVal = DAG.getNode(ISD::TRUNCATE, dl, RetTyVT, RetVal);
}
return std::make_pair(RetVal, Chain);
SDValue GA = DAG.getTargetGlobalAddress(GV, MVT::i64, GSDN->getOffset());
// if (!GV->hasWeakLinkage() && !GV->isDeclaration() && !GV->hasLinkOnceLinkage()) {
- if (GV->hasInternalLinkage()) {
+ if (GV->hasLocalLinkage()) {
SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, GA,
DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i64));
SDValue Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, GA, Hi);
return SDValue();
}
-SDNode *AlphaTargetLowering::ReplaceNodeResults(SDNode *N,
- SelectionDAG &DAG) {
+void AlphaTargetLowering::ReplaceNodeResults(SDNode *N,
+ SmallVectorImpl<SDValue>&Results,
+ SelectionDAG &DAG) {
assert(N->getValueType(0) == MVT::i32 &&
N->getOpcode() == ISD::VAARG &&
"Unknown node to custom promote!");
SDValue Chain, DataPtr;
LowerVAARG(N, Chain, DataPtr, DAG);
- return DAG.getLoad(N->getValueType(0), Chain, DataPtr, NULL, 0).getNode();
+ SDValue Res = DAG.getLoad(N->getValueType(0), Chain, DataPtr, NULL, 0);
+ Results.push_back(Res);
+ Results.push_back(SDValue(Res.getNode(), 1));
}
return sinkMBB;
}
+
+bool
+AlphaTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
+ // The Alpha target isn't yet aware of offsets.
+ return false;
+}