Patch up omissions in DebugLoc propagation.

[oota-llvm.git] / lib / Target / Alpha / AlphaRegisterInfo.cpp

diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index e0859b5f1ac7cdc0cfbf537885fd013ea5fc8760..3523b269cf8750938ae22abad2fa3728b23932a9 100644 (file)
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -103,7 +103,7 @@ BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
 // if frame pointer elimination is disabled.
 //
 bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
-  MachineFrameInfo *MFI = MF.getFrameInfo();
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
   return MFI->hasVarSizedObjects();
 }
 
@@ -125,11 +125,11 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
 
       MachineInstr *New;
       if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
-        New=BuildMI(TII.get(Alpha::LDA), Alpha::R30)
+        New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30)
           .addImm(-Amount).addReg(Alpha::R30);
       } else {
          assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
-         New=BuildMI(TII.get(Alpha::LDA), Alpha::R30)
+         New=BuildMI(MF, TII.get(Alpha::LDA), Alpha::R30)
           .addImm(Amount).addReg(Alpha::R30);
       }
 
@@ -159,7 +159,7 @@ void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   MachineFunction &MF = *MBB.getParent();
   bool FP = hasFP(MF);
 
-  while (!MI.getOperand(i).isFrameIndex()) {
+  while (!MI.getOperand(i).isFI()) {
     ++i;
     assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
   }
@@ -188,7 +188,7 @@ void AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
     MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
     MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
     //insert the new
-    MachineInstr* nMI=BuildMI(TII.get(Alpha::LDAH), Alpha::R28)
+    MachineInstr* nMI=BuildMI(MF, TII.get(Alpha::LDAH), Alpha::R28)
       .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
     MBB.insert(II, nMI);
   } else {