Patch up omissions in DebugLoc propagation.

[oota-llvm.git] / lib / Target / Alpha / AlphaTargetMachine.cpp

diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index 80a88662a12e745eb52b0545ef6782d7b8c57990..c65485b061ca8bdd384a714f53cfd07806e3c8ac 100644 (file)
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -1,35 +1,38 @@
 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 //
 //===----------------------------------------------------------------------===//
 
 #include "Alpha.h"
+#include "AlphaJITInfo.h"
+#include "AlphaTargetAsmInfo.h"
 #include "AlphaTargetMachine.h"
 #include "llvm/Module.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetOptions.h"
+#include "llvm/PassManager.h"
 #include "llvm/Target/TargetMachineRegistry.h"
-#include "llvm/Transforms/Scalar.h"
-#include <iostream>
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
-namespace {
-  // Register the targets
-  RegisterTarget<AlphaTargetMachine> X("alpha", "  Alpha (incomplete)");
-}
+/// AlphaTargetMachineModule - Note that this is used on hosts that cannot link
+/// in a library unless there are references into the library.  In particular,
+/// it seems that it is not possible to get things to work on Win32 without
+/// this.  Though it is unused, do not remove it.
+extern "C" int AlphaTargetMachineModule;
+int AlphaTargetMachineModule = 0;
+
+// Register the targets
+static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
 
-namespace llvm {
-  cl::opt<bool> EnableAlphaLSR("enable-lsr-for-alpha", 
-                             cl::desc("Enable LSR for Alpha (beta option!)"), 
-                             cl::Hidden);
+const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
+  return new AlphaTargetAsmInfo(*this);
 }
 
 unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
@@ -38,6 +41,8 @@ unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
   if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
       TT[3] == 'h' && TT[4] == 'a')
     return 20;
+  // If the target triple is something non-alpha, we don't match.
+  if (!TT.empty()) return 0;
 
   if (M.getEndianness()  == Module::LittleEndian &&
       M.getPointerSize() == Module::Pointer64)
@@ -46,52 +51,55 @@ unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
            M.getPointerSize() != Module::AnyPointerSize)
     return 0;                                    // Match for some other target
 
-  return 0;
+  return getJITMatchQuality()/2;
 }
 
-AlphaTargetMachine::AlphaTargetMachine( const Module &M, IntrinsicLowering *IL)
-  : TargetMachine("alpha", IL, true), 
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) //TODO: check these
-{}
-
-/// addPassesToEmitAssembly - Add passes to the specified pass manager
-/// to implement a static compiler for this target.
-///
-bool AlphaTargetMachine::addPassesToEmitAssembly(PassManager &PM,
-                                                   std::ostream &Out) {
-  
-  if (EnableAlphaLSR)
-    PM.add(createLoopStrengthReducePass());
-
-  // FIXME: Implement efficient support for garbage collection intrinsics.
-  PM.add(createLowerGCPass());
-
-  // FIXME: Implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
-
-  // FIXME: Implement the switch instruction in the instruction selector!
-  PM.add(createLowerSwitchPass());
-
-  // Make sure that no unreachable blocks are instruction selected.
-  PM.add(createUnreachableBlockEliminationPass());
-
-  PM.add(createAlphaPatternInstructionSelector(*this));
+unsigned AlphaTargetMachine::getJITMatchQuality() {
+#ifdef __alpha
+  return 10;
+#else
+  return 0;
+#endif
+}
 
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
+  : DataLayout("e-f128:128:128"),
+    FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
+    JITInfo(*this),
+    Subtarget(M, FS),
+    TLInfo(*this) {
+  setRelocationModel(Reloc::PIC_);
+}
 
-  PM.add(createRegisterAllocator());
 
-  if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+//===----------------------------------------------------------------------===//
+// Pass Pipeline Configuration
+//===----------------------------------------------------------------------===//
 
-  PM.add(createPrologEpilogCodeInserter());
-  
+bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
+  PM.add(createAlphaISelDag(*this));
+  return false;
+}
+bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // Must run branch selection immediately preceding the asm printer
-  //PM.add(createAlphaBranchSelectionPass());
-  
+  PM.add(createAlphaBranchSelectionPass());
+  return false;
+}
+bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
+                                            raw_ostream &Out) {
+  PM.add(createAlphaLLRPPass(*this));
   PM.add(createAlphaCodePrinterPass(Out, *this));
-    
-  PM.add(createMachineCodeDeleter());
   return false;
 }
+bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
+                                        bool DumpAsm, MachineCodeEmitter &MCE) {
+  PM.add(createAlphaCodeEmitterPass(*this, MCE));
+  if (DumpAsm)
+    PM.add(createAlphaCodePrinterPass(errs(), *this));
+  return false;
+}
+bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+                                              bool Fast, bool DumpAsm,
+                                              MachineCodeEmitter &MCE) {
+  return addCodeEmitter(PM, Fast, DumpAsm, MCE);
+}