Patch up omissions in DebugLoc propagation.

[oota-llvm.git] / lib / Target / Alpha / AlphaTargetMachine.cpp

diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp
index f051da45d82d943d2dae43c4c8b01bf8bc84708b..c65485b061ca8bdd384a714f53cfd07806e3c8ac 100644 (file)
--- a/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -17,13 +17,19 @@
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
 #include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Support/raw_ostream.h"
 
 using namespace llvm;
 
-namespace {
-  // Register the targets
-  RegisterTarget<AlphaTargetMachine> X("alpha", "  Alpha (incomplete)");
-}
+/// AlphaTargetMachineModule - Note that this is used on hosts that cannot link
+/// in a library unless there are references into the library.  In particular,
+/// it seems that it is not possible to get things to work on Win32 without
+/// this.  Though it is unused, do not remove it.
+extern "C" int AlphaTargetMachineModule;
+int AlphaTargetMachineModule = 0;
+
+// Register the targets
+static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
 
 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
   return new AlphaTargetAsmInfo(*this);
@@ -57,7 +63,7 @@ unsigned AlphaTargetMachine::getJITMatchQuality() {
 }
 
 AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
-  : DataLayout("e"),
+  : DataLayout("e-f128:128:128"),
     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
     JITInfo(*this),
     Subtarget(M, FS),
@@ -70,29 +76,29 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool AlphaTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createAlphaISelDag(*this));
   return false;
 }
-bool AlphaTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // Must run branch selection immediately preceding the asm printer
   PM.add(createAlphaBranchSelectionPass());
   return false;
 }
-bool AlphaTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
-                                            std::ostream &Out) {
+bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
+                                            raw_ostream &Out) {
   PM.add(createAlphaLLRPPass(*this));
   PM.add(createAlphaCodePrinterPass(Out, *this));
   return false;
 }
-bool AlphaTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   PM.add(createAlphaCodeEmitterPass(*this, MCE));
   if (DumpAsm)
-    PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this));
+    PM.add(createAlphaCodePrinterPass(errs(), *this));
   return false;
 }
-bool AlphaTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM,
+bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
                                               bool Fast, bool DumpAsm,
                                               MachineCodeEmitter &MCE) {
   return addCodeEmitter(PM, Fast, DumpAsm, MCE);