def trailingZeros_xform : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(N->getAPIntValue().countTrailingZeros(),
- EVT::i32);
+ MVT::i32);
}]>;
def trailingOnes_xform : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(N->getAPIntValue().countTrailingOnes(),
- EVT::i32);
+ MVT::i32);
}]>;
def LO16 : SDNodeXForm<imm, [{
- return CurDAG->getTargetConstant((unsigned short)N->getZExtValue(), EVT::i16);
+ return CurDAG->getTargetConstant((unsigned short)N->getZExtValue(), MVT::i16);
}]>;
def HI16 : SDNodeXForm<imm, [{
// Transformation function: shift the immediate value down into the low bits.
- return CurDAG->getTargetConstant((unsigned)N->getZExtValue() >> 16, EVT::i16);
+ return CurDAG->getTargetConstant((unsigned)N->getZExtValue() >> 16, MVT::i16);
}]>;
//===----------------------------------------------------------------------===//
// Immediates
//===----------------------------------------------------------------------===//
-def imm3 : PatLeaf<(imm), [{return isImm<3>(N->getSExtValue());}]>;
-def uimm3 : PatLeaf<(imm), [{return isUimm<3>(N->getZExtValue());}]>;
-def uimm4 : PatLeaf<(imm), [{return isUimm<4>(N->getZExtValue());}]>;
-def uimm5 : PatLeaf<(imm), [{return isUimm<5>(N->getZExtValue());}]>;
+def imm3 : PatLeaf<(imm), [{return isInt<3>(N->getSExtValue());}]>;
+def uimm3 : PatLeaf<(imm), [{return isUint<3>(N->getZExtValue());}]>;
+def uimm4 : PatLeaf<(imm), [{return isUint<4>(N->getZExtValue());}]>;
+def uimm5 : PatLeaf<(imm), [{return isUint<5>(N->getZExtValue());}]>;
def uimm5m2 : PatLeaf<(imm), [{
uint64_t value = N->getZExtValue();
- return value % 2 == 0 && isUimm<5>(value);
+ return value % 2 == 0 && isUint<5>(value);
}]>;
def uimm6m4 : PatLeaf<(imm), [{
uint64_t value = N->getZExtValue();
- return value % 4 == 0 && isUimm<6>(value);
+ return value % 4 == 0 && isUint<6>(value);
}]>;
-def imm7 : PatLeaf<(imm), [{return isImm<7>(N->getSExtValue());}]>;
-def imm16 : PatLeaf<(imm), [{return isImm<16>(N->getSExtValue());}]>;
-def uimm16 : PatLeaf<(imm), [{return isUimm<16>(N->getZExtValue());}]>;
+def imm7 : PatLeaf<(imm), [{return isInt<7>(N->getSExtValue());}]>;
+def imm16 : PatLeaf<(imm), [{return isInt<16>(N->getSExtValue());}]>;
+def uimm16 : PatLeaf<(imm), [{return isUint<16>(N->getZExtValue());}]>;
def ximm16 : PatLeaf<(imm), [{
int64_t value = N->getSExtValue();
def imm17m2 : PatLeaf<(imm), [{
int64_t value = N->getSExtValue();
- return value % 2 == 0 && isImm<17>(value);
+ return value % 2 == 0 && isInt<17>(value);
}]>;
def imm18m4 : PatLeaf<(imm), [{
int64_t value = N->getSExtValue();
- return value % 4 == 0 && isImm<18>(value);
+ return value % 4 == 0 && isInt<18>(value);
}]>;
// 32-bit bitmask transformed to a bit number
let isReturn = 1,
isTerminator = 1,
+ isBarrier = 1,
Uses = [RETS] in
def RTS: F1<(outs), (ins), "rts;", [(BfinRet)]>;
}
def : Pat<(truncstorei16 D:$val, PI:$ptr),
- (STORE16pi (EXTRACT_SUBREG (COPY_TO_REGCLASS D:$val, D),
+ (STORE16pi (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS D:$val, D)),
bfin_subreg_lo16), PI:$ptr)>;
def : Pat<(truncstorei16 (srl D:$val, (i16 16)), PI:$ptr),
- (STORE16pi (EXTRACT_SUBREG (COPY_TO_REGCLASS D:$val, D),
+ (STORE16pi (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS D:$val, D)),
bfin_subreg_hi16), PI:$ptr)>;
def : Pat<(truncstorei8 D16L:$val, P:$ptr),
(STORE8p (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
- (COPY_TO_REGCLASS D16L:$val, D16L),
+ (i16 (COPY_TO_REGCLASS D16L:$val, D16L)),
bfin_subreg_lo16),
P:$ptr)>;
def : Pat<(i32 (anyext D16L:$src)),
(INSERT_SUBREG (i32 (IMPLICIT_DEF)),
- (COPY_TO_REGCLASS D16L:$src, D16L),
+ (i16 (COPY_TO_REGCLASS D16L:$src, D16L)),
bfin_subreg_lo16)>;
// TODO Dreg = Dreg_byte (X/Z)
(EXTRACT_SUBREG (MOVECC_zext JustCC:$cc), bfin_subreg_lo16)>;
def : Pat<(i16 (trunc D:$src)),
- (EXTRACT_SUBREG (COPY_TO_REGCLASS D:$src, D), bfin_subreg_lo16)>;
+ (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS D:$src, D)), bfin_subreg_lo16)>;