Implement rdar://6295824 and PR6724 with two tiny changes

[oota-llvm.git] / lib / Target / Blackfin / BlackfinRegisterInfo.cpp

diff --git a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
index 86a955079fe9210ae265db652ceba5f16f3ff990..2512c9b7fb1de52a08da5453d19c4fb31f6d3d8b 100644 (file)
--- a/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
+++ b/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
@@ -87,7 +87,7 @@ BlackfinRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
 }
 
 const TargetRegisterClass*
-BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
+BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
   assert(isPhysicalRegister(reg) && "reg must be a physical register");
 
   // Pick the smallest register class of the right type that contains
@@ -110,7 +110,8 @@ BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, MVT VT) const {
 // if frame pointer elimination is disabled.
 bool BlackfinRegisterInfo::hasFP(const MachineFunction &MF) const {
   const MachineFrameInfo *MFI = MF.getFrameInfo();
-  return NoFramePointerElim || MFI->hasCalls() || MFI->hasVarSizedObjects();
+  return DisableFramePointerElim(MF) ||
+    MFI->hasCalls() || MFI->hasVarSizedObjects();
 }
 
 bool BlackfinRegisterInfo::
@@ -128,7 +129,7 @@ void BlackfinRegisterInfo::adjustRegister(MachineBasicBlock &MBB,
                                           int delta) const {
   if (!delta)
     return;
-  if (isImm<7>(delta)) {
+  if (isInt<7>(delta)) {
     BuildMI(MBB, I, DL, TII.get(BF::ADDpp_imm7), Reg)
       .addReg(Reg)              // No kill on two-addr operand
       .addImm(delta);
@@ -159,17 +160,17 @@ void BlackfinRegisterInfo::loadConstant(MachineBasicBlock &MBB,
                                         DebugLoc DL,
                                         unsigned Reg,
                                         int value) const {
-  if (isImm<7>(value)) {
+  if (isInt<7>(value)) {
     BuildMI(MBB, I, DL, TII.get(BF::LOADimm7), Reg).addImm(value);
     return;
   }
 
-  if (isUimm<16>(value)) {
+  if (isUInt<16>(value)) {
     BuildMI(MBB, I, DL, TII.get(BF::LOADuimm16), Reg).addImm(value);
     return;
   }
 
-  if (isImm<16>(value)) {
+  if (isInt<16>(value)) {
     BuildMI(MBB, I, DL, TII.get(BF::LOADimm16), Reg).addImm(value);
     return;
   }
@@ -213,15 +214,16 @@ static unsigned findScratchRegister(MachineBasicBlock::iterator II,
                                     const TargetRegisterClass *RC,
                                     int SPAdj) {
   assert(RS && "Register scavenging must be on");
-  unsigned Reg = RS->FindUnusedReg(RC, true);
+  unsigned Reg = RS->FindUnusedReg(RC);
   if (Reg == 0)
     Reg = RS->scavengeRegister(RC, II, SPAdj);
   return Reg;
 }
 
-void BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
-                                               int SPAdj,
-                                               RegScavenger *RS) const {
+unsigned
+BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
+                                          int SPAdj, FrameIndexValue *Value,
+                                          RegScavenger *RS) const {
   MachineInstr &MI = *II;
   MachineBasicBlock &MBB = *MI.getParent();
   MachineFunction &MF = *MBB.getParent();
@@ -254,24 +256,24 @@ void BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
     assert(FIPos==1 && "Bad frame index operand");
     MI.getOperand(FIPos).ChangeToRegister(BaseReg, false);
     MI.getOperand(FIPos+1).setImm(Offset);
-    if (isUimm<6>(Offset)) {
+    if (isUInt<6>(Offset)) {
       MI.setDesc(TII.get(isStore
                          ? BF::STORE32p_uimm6m4
                          : BF::LOAD32p_uimm6m4));
-      return;
+      return 0;
     }
-    if (BaseReg == BF::FP && isUimm<7>(-Offset)) {
+    if (BaseReg == BF::FP && isUInt<7>(-Offset)) {
       MI.setDesc(TII.get(isStore
                          ? BF::STORE32fp_nimm7m4
                          : BF::LOAD32fp_nimm7m4));
       MI.getOperand(FIPos+1).setImm(-Offset);
-      return;
+      return 0;
     }
-    if (isImm<18>(Offset)) {
+    if (isInt<18>(Offset)) {
       MI.setDesc(TII.get(isStore
                          ? BF::STORE32p_imm18m4
                          : BF::LOAD32p_imm18m4));
-      return;
+      return 0;
     }
     // Use RegScavenger to calculate proper offset...
     MI.dump();
@@ -356,6 +358,7 @@ void BlackfinRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
     llvm_unreachable("Cannot eliminate frame index");
     break;
   }
+  return 0;
 }
 
 void BlackfinRegisterInfo::
@@ -366,7 +369,8 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
   if (requiresRegisterScavenging(MF)) {
     // Reserve a slot close to SP or frame pointer.
     RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
-                                                       RC->getAlignment()));
+                                                       RC->getAlignment(),
+                                                       false));
   }
 }
 
@@ -381,9 +385,7 @@ void BlackfinRegisterInfo::emitPrologue(MachineFunction &MF) const {
   MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineFrameInfo *MFI = MF.getFrameInfo();
-  DebugLoc dl = (MBBI != MBB.end()
-                 ? MBBI->getDebugLoc()
-                 : DebugLoc::getUnknownLoc());
+  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
 
   int FrameSize = MFI->getStackSize();
   if (FrameSize%4) {
@@ -447,18 +449,11 @@ unsigned BlackfinRegisterInfo::getRARegister() const {
   return BF::RETS;
 }
 
-unsigned BlackfinRegisterInfo::getFrameRegister(MachineFunction &MF) const {
+unsigned
+BlackfinRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
   return hasFP(MF) ? BF::FP : BF::SP;
 }
 
-int
-BlackfinRegisterInfo::getFrameIndexOffset(MachineFunction &MF, int FI) const {
-  const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
-  MachineFrameInfo *MFI = MF.getFrameInfo();
-  return MFI->getObjectOffset(FI) + MFI->getStackSize() -
-    TFI.getOffsetOfLocalArea() + MFI->getOffsetAdjustment();
-}
-
 unsigned BlackfinRegisterInfo::getEHExceptionRegister() const {
   llvm_unreachable("What is the exception register");
   return 0;