Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).

[oota-llvm.git] / lib / Target / Blackfin / BlackfinTargetMachine.cpp

diff --git a/lib/Target/Blackfin/BlackfinTargetMachine.cpp b/lib/Target/Blackfin/BlackfinTargetMachine.cpp
index 943ce17d4f7f11906205cd3edaab8a5bbd48e8db..a4ae46b90fa0cb1ddcb223eabaac1d38ca3b108b 100644 (file)
--- a/lib/Target/Blackfin/BlackfinTargetMachine.cpp
+++ b/lib/Target/Blackfin/BlackfinTargetMachine.cpp
@@ -12,9 +12,8 @@
 
 #include "BlackfinTargetMachine.h"
 #include "Blackfin.h"
-#include "BlackfinTargetAsmInfo.h"
 #include "llvm/PassManager.h"
-#include "llvm/Target/TargetRegistry.h"
+#include "llvm/Support/TargetRegistry.h"
 
 using namespace llvm;
 
@@ -22,19 +21,19 @@ extern "C" void LLVMInitializeBlackfinTarget() {
   RegisterTargetMachine<BlackfinTargetMachine> X(TheBlackfinTarget);
 }
 
-const TargetAsmInfo* BlackfinTargetMachine::createTargetAsmInfo() const {
-  return new BlackfinTargetAsmInfo();
-}
-
 BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
-                                             const std::string &TT,
-                                             const std::string &FS)
-  : LLVMTargetMachine(T),
-    DataLayout("e-p:32:32-i64:32-f64:32"),
-    Subtarget(TT, FS),
+                                             StringRef TT,
+                                             StringRef CPU,
+                                             StringRef FS,
+                                             Reloc::Model RM,
+                                             CodeModel::Model CM)
+  : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
+    DataLayout("e-p:32:32-i64:32-f64:32-n32"),
+    Subtarget(TT, CPU, FS),
     TLInfo(*this),
+    TSInfo(*this),
     InstrInfo(Subtarget),
-    FrameInfo(TargetFrameInfo::StackGrowsDown, 4, 0) {
+    FrameLowering(Subtarget) {
 }
 
 bool BlackfinTargetMachine::addInstSelector(PassManagerBase &PM,