Revert accidental commit.

[oota-llvm.git] / lib / Target / CellSPU / README.txt

diff --git a/lib/Target/CellSPU/README.txt b/lib/Target/CellSPU/README.txt
index 0e7ad3533e914b8d20cb1ef16ad1c8c9465b8627..3bce9609bfef5a18ed85aa539f1ed2ad6450f2ff 100644 (file)
--- a/lib/Target/CellSPU/README.txt
+++ b/lib/Target/CellSPU/README.txt
@@ -37,6 +37,20 @@ to add 'spu' to configure's --enable-targets option, e.g.:
 ---------------------------------------------------------------------------
 
 TODO:
+* In commit r142152 vector legalization was set to element promotion per
+  default. This breaks half vectors (e.g. v2i32) badly as they get element
+  promoted to much slower types (v2i64).
+
+* Many CellSPU specific codegen tests only grep & count the number of 
+  instructions, not checking their place with FileCheck. There have also
+  been some commits that change the CellSPU checks, some of which might
+  have not been thoroughly scrutinized w.r.t. to the changes they cause in SPU
+  assembly. (especially since about the time of r142152)  
+
+* Some of the i64 math have huge tablegen rules, which sometime cause
+  tablegen to run out of memory. See e.g. bug 8850. i64 arithmetics 
+  should probably be done with libraries.
+
 * Create a machine pass for performing dual-pipeline scheduling specifically
   for CellSPU, and insert branch prediction instructions as needed.
 
@@ -55,7 +69,7 @@ TODO:
 * i128 support:
 
   * zero extension, any extension: done
-  * sign extension: needed
+  * sign extension: done
   * arithmetic operators (add, sub, mul, div): needed
   * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed