Add a quick pass to optimize sign / zero extension instructions. For targets where...

[oota-llvm.git] / lib / Target / CellSPU / README.txt

diff --git a/lib/Target/CellSPU/README.txt b/lib/Target/CellSPU/README.txt
index 636a41d5fc0c895e8351acc46275f1024f20199a..4783dd5d24eb22fd150b5a09bfacdfd59978233b 100644 (file)
--- a/lib/Target/CellSPU/README.txt
+++ b/lib/Target/CellSPU/README.txt
@@ -8,7 +8,7 @@ Department in The Aerospace Corporation:
 - Mark Thomas (floating point instructions)
 - Michael AuYeung (intrinsics)
 - Chandler Carruth (LLVM expertise)
-- Nehal Desai (debugging, RoadRunner SPU expertise)
+- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)
 
 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
@@ -34,23 +34,57 @@ to add 'spu' to configure's --enable-targets option, e.g.:
 
 ---------------------------------------------------------------------------
 
-The unofficially official status page (because it's not easy to get an
-officially blessed external web page from either IBM Austin or Aerospace):
+TODO:
+* Create a machine pass for performing dual-pipeline scheduling specifically
+  for CellSPU, and insert branch prediction instructions as needed.
 
-              http://sites.google.com/site/llvmcellspu/
+* i32 instructions:
 
-TODO:
-* Finish branch instructions, branch prediction
+  * i32 division (work-in-progress)
+
+* i64 support (see i64operations.c test harness):
+
+  * shifts and comparison operators: done
+  * sign and zero extension: done
+  * addition: done
+  * subtraction: needed
+  * multiplication: done
+
+* i128 support:
+
+  * zero extension, any extension: done
+  * sign extension: needed
+  * arithmetic operators (add, sub, mul, div): needed
+  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed
+
+    * or: done
+
+* f64 support
 
-  These instructions were started, but only insofar as to get llvm-gcc-4.2's
-  crtbegin.ll working (which doesn't.)
+  * Comparison operators:
+    SETOEQ              unimplemented
+    SETOGT              unimplemented
+    SETOGE              unimplemented
+    SETOLT              unimplemented
+    SETOLE              unimplemented
+    SETONE              unimplemented
+    SETO                done (lowered)
+    SETUO               done (lowered)
+    SETUEQ              unimplemented
+    SETUGT              unimplemented
+    SETUGE              unimplemented
+    SETULT              unimplemented
+    SETULE              unimplemented
+    SETUNE              unimplemented
 
-* Double floating point support
+* LLVM vector suport
 
-  This was started. "What's missing?" to be filled in.
+  * VSETCC needs to be implemented. It's pretty straightforward to code, but
+    needs implementation.
 
 * Intrinsics
 
-  Lots of progress. "What's missing/incomplete?" to be filled in.
+  * spu.h instrinsics added but not tested. Need to have an operational
+    llvm-spu-gcc in order to write a unit test harness.
 
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