Update the .cvs files.

[oota-llvm.git] / lib / Target / CellSPU / SPUFrameInfo.h

diff --git a/lib/Target/CellSPU/SPUFrameInfo.h b/lib/Target/CellSPU/SPUFrameInfo.h
index 8ce8450a65bea6ae2d71ef1e827a6dafb8815022..e8ca333f0b69b24e5068b80a3fbc477c7633d81e 100644 (file)
--- a/lib/Target/CellSPU/SPUFrameInfo.h
+++ b/lib/Target/CellSPU/SPUFrameInfo.h
@@ -2,9 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by a team from the Computer Systems Research
-// Department at The Aerospace Corporation and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -35,7 +34,7 @@ namespace llvm {
     getCalleeSaveSpillSlots(unsigned &NumEntries) const;
 
     //! Stack slot size (16 bytes)
-    static const int stackSlotSize() {
+    static int stackSlotSize() {
       return 16;
     }
     //! Maximum frame offset representable by a signed 10-bit integer
@@ -43,21 +42,25 @@ namespace llvm {
       This is the maximum frame offset that can be expressed as a 10-bit
       integer, used in D-form addresses.
      */
-    static const int maxFrameOffset() {
+    static int maxFrameOffset() {
       return ((1 << 9) - 1) * stackSlotSize();
     }
     //! Minimum frame offset representable by a signed 10-bit integer
-    static const int minFrameOffset() {
+    static int minFrameOffset() {
       return -(1 << 9) * stackSlotSize();
     }
     //! Minimum frame size (enough to spill LR + SP)
-    static const int minStackSize() {
+    static int minStackSize() {
       return (2 * stackSlotSize());
     }
     //! Frame size required to spill all registers plus frame info
-    static const int fullSpillSize() {
+    static int fullSpillSize() {
       return (SPURegisterInfo::getNumArgRegs() * stackSlotSize());
     }
+    //! Convert frame index to stack offset
+    static int FItoStackOffset(int frame_index) {
+      return frame_index * stackSlotSize();
+    }
     //! Number of instructions required to overcome hint-for-branch latency
     /*!
       HBR (hint-for-branch) instructions can be inserted when, for example,
@@ -66,7 +69,7 @@ namespace llvm {
       of instructions occurs between the HBR and the target. Currently, HBRs
       take 6 cycles, ergo, the magic number 6.
      */
-    static const int branchHintPenalty() {
+    static int branchHintPenalty() {
       return 6;
     }
   };