When ext-loading and trunc-storing vectors to memory, on x86 32bit systems, allow...

[oota-llvm.git] / lib / Target / CellSPU / SPUHazardRecognizers.cpp

diff --git a/lib/Target/CellSPU/SPUHazardRecognizers.cpp b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
index e4787ebfc31e4ccb60e8407247c8e573c1f4c272..67a83f16a649955a11cf9bde4d64afd60787c0c8 100644 (file)
--- a/lib/Target/CellSPU/SPUHazardRecognizers.cpp
+++ b/lib/Target/CellSPU/SPUHazardRecognizers.cpp
@@ -2,10 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by a team from the Computer Systems Research
-// Department at The Aerospace Corporation.
-//
-// See README.txt for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -19,8 +17,10 @@
 #include "SPUHazardRecognizers.h"
 #include "SPU.h"
 #include "SPUInstrInfo.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/Support/Debug.h"
-
+#include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
 //===----------------------------------------------------------------------===//
@@ -30,24 +30,21 @@ using namespace llvm;
 // very little right now.
 //===----------------------------------------------------------------------===//
 
-SPUHazardRecognizer::SPUHazardRecognizer(const TargetInstrInfo &tii) :
-  TII(tii),
-  EvenOdd(0)
-{
-}
-
 /// Return the pipeline hazard type encountered or generated by this
 /// instruction. Currently returns NoHazard.
 ///
 /// \return NoHazard
-HazardRecognizer::HazardType
-SPUHazardRecognizer::getHazardType(SDNode *Node)
+ScheduleHazardRecognizer::HazardType
+SPUHazardRecognizer::getHazardType(SUnit *SU, int Stalls)
 {
   // Initial thoughts on how to do this, but this code cannot work unless the
   // function's prolog and epilog code are also being scheduled so that we can
   // accurately determine which pipeline is being scheduled.
 #if 0
-  HazardRecognizer::HazardType retval = NoHazard;
+  assert(Stalls == 0 && "SPU hazards don't yet support scoreboard lookahead");
+
+  const SDNode *Node = SU->getNode()->getFlaggedMachineNode();
+  ScheduleHazardRecognizer::HazardType retval = NoHazard;
   bool mustBeOdd = false;
 
   switch (Node->getOpcode()) {
@@ -114,7 +111,8 @@ SPUHazardRecognizer::getHazardType(SDNode *Node)
   if (mustBeOdd && !EvenOdd)
     retval = Hazard;
 
-  DOUT << "SPUHazardRecognizer EvenOdd " << EvenOdd << " Hazard " << retval << "\n";
+  DEBUG(errs() << "SPUHazardRecognizer EvenOdd " << EvenOdd << " Hazard "
+               << retval << "\n");
   EvenOdd ^= 1;
   return retval;
 #else
@@ -122,13 +120,13 @@ SPUHazardRecognizer::getHazardType(SDNode *Node)
 #endif
 }
 
-void SPUHazardRecognizer::EmitInstruction(SDNode *Node)
+void SPUHazardRecognizer::EmitInstruction(SUnit *SU)
 {
 }
 
 void SPUHazardRecognizer::AdvanceCycle()
 {
-  DOUT << "SPUHazardRecognizer::AdvanceCycle\n";
+  DEBUG(errs() << "SPUHazardRecognizer::AdvanceCycle\n");
 }
 
 void SPUHazardRecognizer::EmitNoop()