Add Thumb-2 support for TEQ amd TST.

[oota-llvm.git] / lib / Target / CellSPU / SPUInstrInfo.cpp

diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 8623f30112e4ef1297f4a1f38aa63c6725e9181b..4af995a78139b5c622861d854a6213c277646773 100644 (file)
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -60,9 +60,6 @@ SPUInstrInfo::isMoveInstr(const MachineInstr& MI,
                           unsigned& SrcSR, unsigned& DstSR) const {
   SrcSR = DstSR = 0;  // No sub-registers.
 
-  // Primarily, ORI and OR are generated by copyRegToReg. But, there are other
-  // cases where we can safely say that what's being done is really a move
-  // (see how PowerPC does this -- it's the model for this code too.)
   switch (MI.getOpcode()) {
   default:
     break;
@@ -167,7 +164,7 @@ SPUInstrInfo::isMoveInstr(const MachineInstr& MI,
            MI.getOperand(1).isReg() &&
            "invalid SPU OR<type>_<vec> or LR instruction!");
     if (MI.getOperand(0).getReg() == MI.getOperand(1).getReg()) {
-      sourceReg = MI.getOperand(0).getReg();
+      sourceReg = MI.getOperand(1).getReg();
       destReg = MI.getOperand(0).getReg();
       return true;
     }
@@ -323,7 +320,7 @@ SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
   DebugLoc DL = DebugLoc::getUnknownLoc();
   if (MI != MBB.end()) DL = MI->getDebugLoc();
   addFrameReference(BuildMI(MBB, MI, DL, get(opc))
-                    .addReg(SrcReg, false, false, isKill), FrameIdx);
+                    .addReg(SrcReg, getKillRegState(isKill)), FrameIdx);
 }
 
 void SPUInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
@@ -356,7 +353,7 @@ void SPUInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
     }
     DebugLoc DL = DebugLoc::getUnknownLoc();
     MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
-      .addReg(SrcReg, false, false, isKill);
+      .addReg(SrcReg, getKillRegState(isKill));
     for (unsigned i = 0, e = Addr.size(); i != e; ++i)
       MIB.addOperand(Addr[i]);
     NewMIs.push_back(MIB);
@@ -394,7 +391,7 @@ SPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
 
   DebugLoc DL = DebugLoc::getUnknownLoc();
   if (MI != MBB.end()) DL = MI->getDebugLoc();
-  addFrameReference(BuildMI(MBB, MI, DL, get(opc)).addReg(DestReg), FrameIdx);
+  addFrameReference(BuildMI(MBB, MI, DL, get(opc), DestReg), FrameIdx);
 }
 
 /*!
@@ -498,7 +495,7 @@ SPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
         MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(),
                                           get(SPU::STQDr32));
 
-        MIB.addReg(InReg, false, false, isKill);
+        MIB.addReg(InReg, getKillRegState(isKill));
         NewMI = addFrameReference(MIB, FrameIndex);
       }
     } else {           // move -> load
@@ -506,7 +503,7 @@ SPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
       bool isDead = MI->getOperand(0).isDead();
       MachineInstrBuilder MIB = BuildMI(MF, MI->getDebugLoc(), get(Opc));
 
-      MIB.addReg(OutReg, true, false, false, isDead);
+      MIB.addReg(OutReg, RegState::Define | getDeadRegState(isDead));
       Opc = (FrameIndex < SPUFrameInfo::maxFrameOffset())
         ? SPU::STQDr32 : SPU::STQXr32;
       NewMI = addFrameReference(MIB, FrameIndex);