Eliminate target hook IsEligibleForTailCallOptimization.

[oota-llvm.git] / lib / Target / CellSPU / SPURegisterInfo.cpp

diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index 030a7d7600dfee31a533af43be96f847d1f8b413..af94e67bbdce313bd4b57ce214ed820ba8c718d8 100644 (file)
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -35,7 +35,9 @@
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
@@ -176,8 +178,7 @@ unsigned SPURegisterInfo::getRegisterNumbering(unsigned RegEnum) {
   case SPU::R126: return 126;
   case SPU::R127: return 127;
   default:
-    cerr << "Unhandled reg in SPURegisterInfo::getRegisterNumbering!\n";
-    abort();
+    llvm_report_error("Unhandled reg in SPURegisterInfo::getRegisterNumbering");
   }
 }
 
@@ -218,8 +219,8 @@ SPURegisterInfo::getNumArgRegs()
 
 /// getPointerRegClass - Return the register class to use to hold pointers.
 /// This is used for addressing modes.
-const TargetRegisterClass * SPURegisterInfo::getPointerRegClass() const
-{
+const TargetRegisterClass *
+SPURegisterInfo::getPointerRegClass(unsigned Kind) const {
   return &SPU::R32CRegClass;
 }
 
@@ -325,9 +326,9 @@ SPURegisterInfo::eliminateCallFramePseudoInstr(MachineFunction &MF,
   MBB.erase(I);
 }
 
-void
+unsigned
 SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
-                                     RegScavenger *RS) const
+                                     int *Value, RegScavenger *RS) const
 {
   unsigned i = 0;
   MachineInstr &MI = *II;
@@ -364,12 +365,13 @@ SPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
   SPOp.ChangeToRegister(SPU::R1, false);
   if (Offset > SPUFrameInfo::maxFrameOffset()
       || Offset < SPUFrameInfo::minFrameOffset()) {
-    cerr << "Large stack adjustment ("
+    errs() << "Large stack adjustment ("
          << Offset
          << ") in SPURegisterInfo::eliminateFrameIndex.";
   } else {
     MO.ChangeToImmediate(Offset);
   }
+  return 0;
 }
 
 /// determineFrameLayout - Determine the size of the frame and maximum call
@@ -428,6 +430,8 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineFrameInfo *MFI = MF.getFrameInfo();
   MachineModuleInfo *MMI = MFI->getMachineModuleInfo();
+  DebugLoc dl = (MBBI != MBB.end() ?
+                 MBBI->getDebugLoc() : DebugLoc::getUnknownLoc());
 
   // Prepare for debug frame info.
   bool hasDebugInfo = MMI && MMI->hasDebugInfo();
@@ -448,43 +452,45 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const
     if (hasDebugInfo) {
       // Mark effective beginning of when frame pointer becomes valid.
       FrameLabelId = MMI->NextLabelID();
-      BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(FrameLabelId);
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::DBG_LABEL)).addImm(FrameLabelId);
     }
 
     // Adjust stack pointer, spilling $lr -> 16($sp) and $sp -> -FrameSize($sp)
     // for the ABI
-    BuildMI(MBB, MBBI, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
+    BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R0).addImm(16)
       .addReg(SPU::R1);
     if (isS10Constant(FrameSize)) {
       // Spill $sp to adjusted $sp
-      BuildMI(MBB, MBBI, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1).addImm(FrameSize)
         .addReg(SPU::R1);
       // Adjust $sp by required amout
-      BuildMI(MBB, MBBI, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1).addReg(SPU::R1)
         .addImm(FrameSize);
     } else if (FrameSize <= (1 << 16) - 1 && FrameSize >= -(1 << 16)) {
       // Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
       // $r2 to adjust $sp:
-      BuildMI(MBB, MBBI, TII.get(SPU::STQDr128), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
         .addImm(-16)
         .addReg(SPU::R1);
-      BuildMI(MBB, MBBI, TII.get(SPU::ILr32), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
         .addImm(FrameSize);
-      BuildMI(MBB, MBBI, TII.get(SPU::STQDr32), SPU::R1)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr32), SPU::R1)
         .addReg(SPU::R2)
         .addReg(SPU::R1);
-      BuildMI(MBB, MBBI, TII.get(SPU::Ar32), SPU::R1)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1)
         .addReg(SPU::R1)
         .addReg(SPU::R2);
-      BuildMI(MBB, MBBI, TII.get(SPU::SFIr32), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2)
         .addReg(SPU::R2)
         .addImm(16);
-      BuildMI(MBB, MBBI, TII.get(SPU::LQXr128), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
         .addReg(SPU::R2)
         .addReg(SPU::R1);
     } else {
-      cerr << "Unhandled frame size: " << FrameSize << "\n";
-      abort();
+      std::string msg;
+      raw_string_ostream Msg(msg);
+      Msg << "Unhandled frame size: " << FrameSize;
+      llvm_report_error(Msg.str());
     }
 
     if (hasDebugInfo) {
@@ -508,7 +514,7 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const
 
       // Mark effective beginning of when frame pointer is ready.
       unsigned ReadyLabelId = MMI->NextLabelID();
-      BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(ReadyLabelId);
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::DBG_LABEL)).addImm(ReadyLabelId);
 
       MachineLocation FPDst(SPU::R1);
       MachineLocation FPSrc(MachineLocation::VirtualFP);
@@ -520,9 +526,11 @@ void SPURegisterInfo::emitPrologue(MachineFunction &MF) const
     // this is just a best guess based on the basic block's size.
     if (MBB.size() >= (unsigned) SPUFrameInfo::branchHintPenalty()) {
       MachineBasicBlock::iterator MBBI = prior(MBB.end());
+      dl = MBBI->getDebugLoc();
+
       // Insert terminator label
       unsigned BranchLabelId = MMI->NextLabelID();
-      BuildMI(MBB, MBBI, TII.get(SPU::DBG_LABEL)).addImm(BranchLabelId);
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::DBG_LABEL)).addImm(BranchLabelId);
     }
   }
 }
@@ -534,6 +542,7 @@ SPURegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
   const MachineFrameInfo *MFI = MF.getFrameInfo();
   int FrameSize = MFI->getStackSize();
   int LinkSlotOffset = SPUFrameInfo::stackSlotSize();
+  DebugLoc dl = MBBI->getDebugLoc();
 
   assert(MBBI->getOpcode() == SPU::RET &&
          "Can only insert epilog into returning blocks");
@@ -545,35 +554,37 @@ SPURegisterInfo::emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
       // Reload $lr, adjust $sp by required amount
       // Note: We do this to slightly improve dual issue -- not by much, but it
       // is an opportunity for dual issue.
-      BuildMI(MBB, MBBI, TII.get(SPU::LQDr128), SPU::R0)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::LQDr128), SPU::R0)
         .addImm(FrameSize + LinkSlotOffset)
         .addReg(SPU::R1);
-      BuildMI(MBB, MBBI, TII.get(SPU::AIr32), SPU::R1)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::AIr32), SPU::R1)
         .addReg(SPU::R1)
         .addImm(FrameSize);
     } else if (FrameSize <= (1 << 16) - 1 && FrameSize >= -(1 << 16)) {
       // Frame size can be loaded into ILr32n, so temporarily spill $r2 and use
       // $r2 to adjust $sp:
-      BuildMI(MBB, MBBI, TII.get(SPU::STQDr128), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::STQDr128), SPU::R2)
         .addImm(16)
         .addReg(SPU::R1);
-      BuildMI(MBB, MBBI, TII.get(SPU::ILr32), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::ILr32), SPU::R2)
         .addImm(FrameSize);
-      BuildMI(MBB, MBBI, TII.get(SPU::Ar32), SPU::R1)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::Ar32), SPU::R1)
         .addReg(SPU::R1)
         .addReg(SPU::R2);
-      BuildMI(MBB, MBBI, TII.get(SPU::LQDr128), SPU::R0)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::LQDr128), SPU::R0)
         .addImm(16)
         .addReg(SPU::R2);
-      BuildMI(MBB, MBBI, TII.get(SPU::SFIr32), SPU::R2).
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::SFIr32), SPU::R2).
         addReg(SPU::R2)
         .addImm(16);
-      BuildMI(MBB, MBBI, TII.get(SPU::LQXr128), SPU::R2)
+      BuildMI(MBB, MBBI, dl, TII.get(SPU::LQXr128), SPU::R2)
         .addReg(SPU::R2)
         .addReg(SPU::R1);
     } else {
-      cerr << "Unhandled frame size: " << FrameSize << "\n";
-      abort();
+      std::string msg;
+      raw_string_ostream Msg(msg);
+      Msg << "Unhandled frame size: " << FrameSize;
+      llvm_report_error(Msg.str());
     }
    }
 }
@@ -585,7 +596,7 @@ SPURegisterInfo::getRARegister() const
 }
 
 unsigned
-SPURegisterInfo::getFrameRegister(MachineFunction &MF) const
+SPURegisterInfo::getFrameRegister(const MachineFunction &MF) const
 {
   return SPU::R1;
 }