Update the .cvs files.

[oota-llvm.git] / lib / Target / CellSPU / SPURegisterInfo.cpp

diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index 39edccb606ebf606b3504789255698484d0fa167..b6b7fd3174159be0d69100e0319e1f6d5eb3f0f7 100644 (file)
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file contains the Cell implementation of the MRegisterInfo class.
+// This file contains the Cell implementation of the TargetRegisterInfo class.
 //
 //===----------------------------------------------------------------------===//
 
@@ -40,7 +40,6 @@
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/STLExtras.h"
 #include <cstdlib>
-#include <iostream>
 
 using namespace llvm;
 
@@ -178,7 +177,7 @@ unsigned SPURegisterInfo::getRegisterNumbering(unsigned RegEnum) {
   case SPU::R126: return 126;
   case SPU::R127: return 127;
   default:
-    std::cerr << "Unhandled reg in SPURegisterInfo::getRegisterNumbering!\n";
+    cerr << "Unhandled reg in SPURegisterInfo::getRegisterNumbering!\n";
     abort();
   }
 }
@@ -191,15 +190,6 @@ SPURegisterInfo::SPURegisterInfo(const SPUSubtarget &subtarget,
 {
 }
 
-void SPURegisterInfo::reMaterialize(MachineBasicBlock &MBB,
-                                    MachineBasicBlock::iterator I,
-                                    unsigned DestReg,
-                                    const MachineInstr *Orig) const {
-  MachineInstr *MI = Orig->clone();
-  MI->getOperand(0).setReg(DestReg);
-  MBB.insert(I, MI);
-}
-
 // SPU's 128-bit registers used for argument passing:
 static const unsigned SPU_ArgRegs[] = {
   SPU::R3,  SPU::R4,  SPU::R5,  SPU::R6,  SPU::R7,  SPU::R8,  SPU::R9,
@@ -221,7 +211,7 @@ SPURegisterInfo::getArgRegs()
   return SPU_ArgRegs;
 }
 
-const unsigned
+unsigned
 SPURegisterInfo::getNumArgRegs()
 {
   return sizeof(SPU_ArgRegs) / sizeof(SPU_ArgRegs[0]);