Eliminate target hook IsEligibleForTailCallOptimization.

[oota-llvm.git] / lib / Target / CellSPU / SPURegisterInfo.td

diff --git a/lib/Target/CellSPU/SPURegisterInfo.td b/lib/Target/CellSPU/SPURegisterInfo.td
index de64439826de00b64243e4bbf755427e298d304a..bb88f2bf9a2986b1a7168778d4db585bd76e12fb 100644 (file)
--- a/lib/Target/CellSPU/SPURegisterInfo.td
+++ b/lib/Target/CellSPU/SPURegisterInfo.td
@@ -2,9 +2,8 @@
 // 
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by a team from the Computer Systems Research
-// Department at The Aerospace Corporation and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 // 
 //===----------------------------------------------------------------------===//
 //
@@ -394,7 +393,9 @@ def R8C : RegisterClass<"SPU", [i8], 128,
 }
 
 // The SPU's registers as vector registers:
-def VECREG : RegisterClass<"SPU", [v16i8,v8i16,v4i32,v4f32,v2i64,v2f64], 128,
+def VECREG : RegisterClass<"SPU",
+                           [v16i8,v8i16,v2i32,v4i32,v4f32,v2i64,v2f64],
+                           128,
  [
    /* volatile register */
    R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16,