//
//===----------------------------------------------------------------------===//
-#ifndef TARGET_Hexagon_H
-#define TARGET_Hexagon_H
+#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
+#define LLVM_LIB_TARGET_HEXAGON_HEXAGON_H
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/Target/TargetLowering.h"
namespace llvm {
class FunctionPass;
+ class ModulePass;
class TargetMachine;
class MachineInstr;
- class MCInst;
+ class HexagonMCInst;
class HexagonAsmPrinter;
class HexagonTargetMachine;
class raw_ostream;
- FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM);
- FunctionPass *createHexagonDelaySlotFillerPass(TargetMachine &TM);
- FunctionPass *createHexagonFPMoverPass(TargetMachine &TM);
- FunctionPass *createHexagonRemoveExtendOps(HexagonTargetMachine &TM);
- FunctionPass *createHexagonCFGOptimizer(HexagonTargetMachine &TM);
-
- FunctionPass *createHexagonSplitTFRCondSets(HexagonTargetMachine &TM);
- FunctionPass *createHexagonExpandPredSpillCode(HexagonTargetMachine &TM);
+ FunctionPass *createHexagonISelDag(HexagonTargetMachine &TM,
+ CodeGenOpt::Level OptLevel);
+ FunctionPass *createHexagonDelaySlotFillerPass(const TargetMachine &TM);
+ FunctionPass *createHexagonFPMoverPass(const TargetMachine &TM);
+ FunctionPass *createHexagonRemoveExtendArgs(const HexagonTargetMachine &TM);
+ FunctionPass *createHexagonCFGOptimizer();
+ FunctionPass *createHexagonSplitTFRCondSets();
+ FunctionPass *createHexagonSplitConst32AndConst64();
+ FunctionPass *createHexagonExpandPredSpillCode();
FunctionPass *createHexagonHardwareLoops();
FunctionPass *createHexagonPeephole();
FunctionPass *createHexagonFixupHwLoops();
+ FunctionPass *createHexagonNewValueJump();
+ FunctionPass *createHexagonCopyToCombine();
+ FunctionPass *createHexagonPacketizer();
+ FunctionPass *createHexagonNewValueJump();
/* TODO: object output.
MCCodeEmitter *createHexagonMCCodeEmitter(const Target &,
- TargetMachine &TM,
+ const TargetMachine &TM,
MCContext &Ctx);
*/
/* TODO: assembler input.
- TargetAsmBackend *createHexagonAsmBackend(const Target &, const std::string &);
+ TargetAsmBackend *createHexagonAsmBackend(const Target &,
+ const std::string &);
*/
- void HexagonLowerToMC(const MachineInstr *MI, MCInst &MCI,
+ void HexagonLowerToMC(const MachineInstr *MI, HexagonMCInst &MCI,
HexagonAsmPrinter &AP);
} // end namespace llvm;
// Normal instruction size (in bytes).
#define HEXAGON_INSTR_SIZE 4
-// Maximum number of words in a packet (in instructions).
+// Maximum number of words and instructions in a packet.
#define HEXAGON_PACKET_SIZE 4
#endif