let Aliases = [R];
}
- def subreg_loreg : SubRegIndex;
- def subreg_hireg : SubRegIndex;
+ def subreg_loreg : SubRegIndex<32>;
+ def subreg_hireg : SubRegIndex<32, 32>;
// Integer registers.
def R0 : Ri< 0, "r0">, DwarfRegNum<[0]>;
def DoubleRegs : RegisterClass<"Hexagon", [i64,f64], 64,
(add (sequence "D%u", 0, 4),
- (sequence "D%u", 6, 13), D5, D14, D15)> {
- let SubRegClasses = [(IntRegs subreg_loreg, subreg_hireg)];
-}
+ (sequence "D%u", 6, 13), D5, D14, D15)>;
def PredRegs : RegisterClass<"Hexagon", [i1], 32, (add (sequence "P%u", 0, 3))>