Use a range loop. NFC.

[oota-llvm.git] / lib / Target / Hexagon / HexagonRegisterInfo.td

diff --git a/lib/Target/Hexagon/HexagonRegisterInfo.td b/lib/Target/Hexagon/HexagonRegisterInfo.td
index 486bd5cec61b15e88bfc3f0886d608b1eb35ba6a..8ea1b7e75db7c95094d52b9be5e5489faed2acb0 100644 (file)
--- a/lib/Target/Hexagon/HexagonRegisterInfo.td
+++ b/lib/Target/Hexagon/HexagonRegisterInfo.td
@@ -134,9 +134,8 @@ let Namespace = "Hexagon" in {
   def M0 : Rc<6, "m0">, DwarfRegNum<[71]>;
   def M1 : Rc<7, "m1">, DwarfRegNum<[72]>;
 
-  def USR : Rc<8, "usr">, DwarfRegNum<[34]>;
-  def PC : Rc<9,  "pc">, DwarfRegNum<[32]>;
-  def GP : Rc<11, "gp">, DwarfRegNum<[33]>;
+  def PC : Rc<9,  "pc">, DwarfRegNum<[32]>; // is the Dwarf number correct?
+  def GP : Rc<11, "gp">, DwarfRegNum<[33]>; // is the Dwarf number correct?
 }
 
 // Register classes.
@@ -163,6 +162,6 @@ def PredRegs : RegisterClass<"Hexagon", [i1], 32, (add (sequence "P%u", 0, 3))>
 def CRRegs : RegisterClass<"Hexagon", [i32], 32,
                            (add (sequence "LC%u", 0, 1),
                                 (sequence "SA%u", 0, 1),
-                                (sequence "M%u", 0, 1), PC, GP, USR)> {
+                                (sequence "M%u", 0, 1), PC, GP)> {
   let Size = 32;
 }