[Hexagon] Adding functionality for duplexing. Duplexing is a way to compress commonl...

[oota-llvm.git] / lib / Target / Hexagon / HexagonSchedule.td

diff --git a/lib/Target/Hexagon/HexagonSchedule.td b/lib/Target/Hexagon/HexagonSchedule.td
index fbea4452ec6c42338497b827d70546bb8daa7a2b..528cafc2bfea51614266c621b1c9f58a2db93e2a 100644 (file)
--- a/lib/Target/Hexagon/HexagonSchedule.td
+++ b/lib/Target/Hexagon/HexagonSchedule.td
@@ -7,41 +7,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-// Functional Units
-def LUNIT     : FuncUnit;
-def LSUNIT    : FuncUnit;
-def MUNIT     : FuncUnit;
-def SUNIT     : FuncUnit;
-
-
-// Itinerary classes
-def ALU32     : InstrItinClass;
-def ALU64     : InstrItinClass;
-def CR        : InstrItinClass;
-def J         : InstrItinClass;
-def JR        : InstrItinClass;
-def LD        : InstrItinClass;
-def M         : InstrItinClass;
-def ST        : InstrItinClass;
-def S         : InstrItinClass;
-def PSEUDO    : InstrItinClass;
-
-
-def HexagonItineraries :
- ProcessorItineraries<[LUNIT, LSUNIT, MUNIT, SUNIT], [], [
-  InstrItinData<ALU32      , [InstrStage<1,  [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
-  InstrItinData<ALU64      , [InstrStage<1,  [MUNIT, SUNIT]>]>,
-  InstrItinData<CR         , [InstrStage<1,  [SUNIT]>]>,
-  InstrItinData<J          , [InstrStage<1,  [SUNIT, MUNIT]>]>,
-  InstrItinData<JR         , [InstrStage<1,  [MUNIT]>]>,
-  InstrItinData<LD         , [InstrStage<1,  [LUNIT, LSUNIT]>]>,
-  InstrItinData<M          , [InstrStage<1,  [MUNIT, SUNIT]>]>,
-  InstrItinData<ST         , [InstrStage<1,  [LSUNIT]>]>,
-  InstrItinData<S          , [InstrStage<1,  [SUNIT, MUNIT]>]>,
-  InstrItinData<PSEUDO     , [InstrStage<1,  [LUNIT, LSUNIT, MUNIT, SUNIT]>]>
-]>;
-
-
 //===----------------------------------------------------------------------===//
 // V4 Machine Info +
 //===----------------------------------------------------------------------===//