Ensure CopyToReg nodes are always glued to the call instruction.

[oota-llvm.git] / lib / Target / Hexagon / HexagonTargetMachine.h

diff --git a/lib/Target/Hexagon/HexagonTargetMachine.h b/lib/Target/Hexagon/HexagonTargetMachine.h
index 712cf3d5eaeb63af7adc3e058fa14559c5f361b3..0336965d11f145e7aa27155d9a0543abb7f67623 100644 (file)
--- a/lib/Target/Hexagon/HexagonTargetMachine.h
+++ b/lib/Target/Hexagon/HexagonTargetMachine.h
@@ -14,13 +14,13 @@
 #ifndef HexagonTARGETMACHINE_H
 #define HexagonTARGETMACHINE_H
 
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetData.h"
 #include "HexagonInstrInfo.h"
 #include "HexagonSubtarget.h"
 #include "HexagonISelLowering.h"
 #include "HexagonSelectionDAGInfo.h"
 #include "HexagonFrameLowering.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetData.h"
 
 namespace llvm {
 
@@ -37,8 +37,9 @@ class HexagonTargetMachine : public LLVMTargetMachine {
 
 public:
   HexagonTargetMachine(const Target &T, StringRef TT,StringRef CPU,
-                       StringRef FS, TargetOptions Options, Reloc::Model RM,
-                       CodeModel::Model CM, CodeGenOpt::Level OL);
+                       StringRef FS, const TargetOptions &Options,
+                       Reloc::Model RM, CodeModel::Model CM,
+                       CodeGenOpt::Level OL);
 
   virtual const HexagonInstrInfo *getInstrInfo() const {
     return &InstrInfo;
@@ -72,11 +73,7 @@ public:
 
   // Pass Pipeline Configuration.
   virtual bool addPassesForOptimizations(PassManagerBase &PM);
-  virtual bool addInstSelector(PassManagerBase &PM);
-  virtual bool addPreEmitPass(PassManagerBase &PM);
-  virtual bool addPreRegAlloc(llvm::PassManagerBase &PM);
-  virtual bool addPostRegAlloc(PassManagerBase &PM);
-  virtual bool addPreSched2(PassManagerBase &PM);
+  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
 };
 
 extern bool flag_aligned_memcpy;