fix storing bools! eek!

[oota-llvm.git] / lib / Target / IA64 / IA64ISelLowering.cpp

diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index e97bb124b505bc7564b62c8081432f29fd47e074..c4a4cdf94353bf02c7d228666ac6cefdb9e78c5d 100644 (file)
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -80,6 +80,15 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
       //IA64 has these, but they are not implemented
       setOperationAction(ISD::CTTZ , MVT::i64  , Expand);
       setOperationAction(ISD::CTLZ , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTL , MVT::i64  , Expand);
+      setOperationAction(ISD::ROTR , MVT::i64  , Expand);
+      setOperationAction(ISD::BSWAP, MVT::i64  , Expand);  // mux @rev
+
+      setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
+      setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand);
+      setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand);
+
+      setStackPointerRegisterToSaveRestore(IA64::r12);
 
       computeRegisterProperties();
 
@@ -87,6 +96,15 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
       addLegalFPImmediate(+1.0);
 }
 
+const char *IA64TargetLowering::getTargetNodeName(unsigned Opcode) const {
+  switch (Opcode) {
+  default: return 0;
+  case IA64ISD::GETFD:  return "IA64ISD::GETFD";
+  case IA64ISD::BRCALL: return "IA64ISD::BRCALL";  
+  }
+}
+  
+
 /// isFloatingPointZero - Return true if this is 0.0 or -0.0.
 static bool isFloatingPointZero(SDOperand Op) {
   if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Op))
@@ -374,14 +392,14 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   
   // save the current GP, SP and RP : FIXME: do we need to do all 3 always?
   SDOperand GPBeforeCall = DAG.getCopyFromReg(Chain, IA64::r1, MVT::i64, InFlag);
-  Chain = GPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = GPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
   SDOperand SPBeforeCall = DAG.getCopyFromReg(Chain, IA64::r12, MVT::i64, InFlag);
-  Chain = SPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = SPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
   SDOperand RPBeforeCall = DAG.getCopyFromReg(Chain, IA64::rp, MVT::i64, InFlag);
-  Chain = RPBeforeCall;
-  InFlag = Chain.getValue(1);
+  Chain = RPBeforeCall.getValue(1);
+  InFlag = Chain.getValue(2);
 
   // Build a sequence of copy-to-reg nodes chained together with token chain
   // and flag operands which copy the outgoing integer args into regs out[0-7]
@@ -390,11 +408,12 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   // know this is required (i.e. for varardic or external (unknown) functions)
 
   // first to the FP->(integer representation) conversions, these are
-  // free-floating
+  // flagged for now, but shouldn't have to be (TODO)
   unsigned seenConverts = 0;
   for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) {
     if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) {
-      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++]);
+      Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], InFlag);
+      InFlag = Chain.getValue(1);
     }
   }
 
@@ -426,6 +445,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   // emit the call itself
   if (InFlag.Val)
     CallOperands.push_back(InFlag);
+  else
+    assert(0 && "this should never happen!\n");
 
 /* out with the old...
     Chain = SDOperand(DAG.getCall(NodeTys, Chain, Callee, InFlag), 0);
@@ -452,7 +473,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
   SDOperand RetVal;
   if (RetTyVT != MVT::isVoid) {
     switch (RetTyVT) {
-    default: // assert(0 && "Unknown value type to return!");
+    default: assert(0 && "Unknown value type to return!");
     case MVT::i1: { // bools are just like other integers (returned in r8)
       SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
       InFlag = boolInR8.getValue(2);
@@ -470,7 +491,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
       RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
       Chain = RetVal.getValue(1);
       
-      // Add a note to keep track of whether it is sign or zero extended - TODO: bools
+      // keep track of whether it is sign or zero extended (todo: bools?)
       RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext,
                            MVT::i64, RetVal, DAG.getValueType(RetTyVT));
       RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
@@ -478,10 +499,17 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
     case MVT::i64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
       Chain = RetVal.getValue(1);
+      InFlag = RetVal.getValue(2); // XXX dead
+      break;
+    case MVT::f32:
+      RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
+      Chain = RetVal.getValue(1);
+      RetVal = DAG.getNode(ISD::TRUNCATE, MVT::f32, RetVal);
       break;
     case MVT::f64:
       RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
       Chain = RetVal.getValue(1);
+      InFlag = RetVal.getValue(2); // XXX dead
       break;
     }
   }