1. Adding test cases for MBlaze MC disassembler.

[oota-llvm.git] / lib / Target / MBlaze / TODO

diff --git a/lib/Target/MBlaze/TODO b/lib/Target/MBlaze/TODO
index 737f111c638ab2550fefa19988a1d55395ac536e..cc0aa48288cf45090886c31f2e4e01c6973149c9 100644 (file)
--- a/lib/Target/MBlaze/TODO
+++ b/lib/Target/MBlaze/TODO
@@ -1,8 +1,5 @@
 * Writing out ELF files is close to working but the following needs to
   be examined more closely:
-    - ELF files are written with the wrong E_MACHINE value because
-      ELFObjectWriter::WriteHeader function does not yet support
-      target specific E_MACHINE values.
     - ELF relocation records are incorrect because the function
       ELFObjectWriter::RecordRelocation is hard coded for X86/X86-64.
     - Relocations use 2-byte / 4-byte to terminology in reference to
@@ -16,6 +13,10 @@
       branch += 32768 bytes (~8192 instructions). We should allow conditional
       branches to use 4-byte relocations but I'm not sure how to do that
       right now.
+    - Relocation records for indirect calls are not being generated
+      correctly. These should emit and IMM 0 directly before the ORI
+      instruction that loads the register (just like when a BRLID
+      instruction is used instead of an ORI).
 
 * Code generation seems to work relatively well now but the following
   needs to be examined more closely:
@@ -24,3 +25,18 @@
     - The delay slot filler is ad hoc but seems to work. Load and
       store instructions were prevented from being moved to delay
       slots but I'm not sure that is necessary.
+    - The processor itineraries are copied from a different backend
+      and need to be updated to model the MicroBlaze correctly.
+    - Look at the MBlazeGenFastISel.inc stuff and make use of it
+      if appropriate.
+
+* A basic assembly parser is present now and seems to parse most things.
+  There are a few things that need to be looked at:
+    - There are some instructions that are not generated by the backend
+      and have not been tested as far as the parser is concerned.
+    - The assembly parser does not use any MicroBlaze specific directives.
+      I should investigate if there are MicroBlaze specific directive and,
+      if there are, add them.
+    - The instruction MFS and MTS use special names for some of the
+      special registers that can be accessed. These special register
+      names should be parsed by the assembly parser.