[FastISel][AArch64] Use the correct register class for branches.

[oota-llvm.git] / lib / Target / MSP430 / MSP430.td

diff --git a/lib/Target/MSP430/MSP430.td b/lib/Target/MSP430/MSP430.td
index 99dc62dbc7e0b5f3f67876c6566c8dbd4eb53184..dfea669f3ba1bbb8a75c6acfeae5c75b7061e800 100644 (file)
--- a/lib/Target/MSP430/MSP430.td
+++ b/lib/Target/MSP430/MSP430.td
@@ -1,4 +1,4 @@
-//===- MSP430.td - Describe the MSP430 Target Machine ---------*- tblgen -*-==//
+//===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -36,13 +36,19 @@ def : Proc<"generic",         []>;
 
 include "MSP430RegisterInfo.td"
 
+//===----------------------------------------------------------------------===//
+// Calling Convention Description
+//===----------------------------------------------------------------------===//
+
+include "MSP430CallingConv.td"
+
 //===----------------------------------------------------------------------===//
 // Instruction Descriptions
 //===----------------------------------------------------------------------===//
 
 include "MSP430InstrInfo.td"
 
-def MSP430InstrInfo : InstrInfo {} 
+def MSP430InstrInfo : InstrInfo;
 
 //===----------------------------------------------------------------------===//
 // Target Declaration