Add the necessary support to codegen condition register logical ops with

[oota-llvm.git] / lib / Target / Makefile

diff --git a/lib/Target/Makefile b/lib/Target/Makefile
index bb23fb47771b0d626f61fa25fcbd19106a56613f..5b69f49b2eb3019f768eda0061729480115c9b73 100644 (file)
--- a/lib/Target/Makefile
+++ b/lib/Target/Makefile
@@ -7,7 +7,7 @@
 # 
 ##===----------------------------------------------------------------------===##
 LEVEL = ../..
-PARALLEL_DIRS = CBackend X86 SparcV8 SparcV9 PowerPC Alpha Skeleton
+PARALLEL_DIRS = CBackend X86 SparcV8 SparcV9 PowerPC Alpha IA64 Skeleton
 LIBRARYNAME = LLVMTarget
 BUILD_ARCHIVE = 1