Patch up omissions in DebugLoc propagation.

[oota-llvm.git] / lib / Target / Mips / MipsISelLowering.cpp

diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 557a1050c6d15bbbcd32ce19f39a1cc1579cd4c8..5af38bf4ab4708638f808bbb8be037deb0a0ad3c 100644 (file)
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -31,9 +31,6 @@
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/ValueTypes.h"
 #include "llvm/Support/Debug.h"
-#include <queue>
-#include <set>
-
 using namespace llvm;
 
 const char *MipsTargetLowering::
@@ -62,7 +59,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
 
   // Mips does not have i1 type, so use i32 for
   // setcc operations results (slt, sgt, ...). 
-  setSetCCResultContents(ZeroOrOneSetCCResult);
+  setBooleanContents(ZeroOrOneBooleanContent);
 
   // JumpTable targets must use GOT when using PIC_
   setUsesGlobalOffsetTable(true);
@@ -82,9 +79,9 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
   addLegalFPImmediate(APFloat(+0.0f));
 
   // Load extented operations for i1 types must be promoted 
-  setLoadXAction(ISD::EXTLOAD,  MVT::i1,  Promote);
-  setLoadXAction(ISD::ZEXTLOAD, MVT::i1,  Promote);
-  setLoadXAction(ISD::SEXTLOAD, MVT::i1,  Promote);
+  setLoadExtAction(ISD::EXTLOAD,  MVT::i1,  Promote);
+  setLoadExtAction(ISD::ZEXTLOAD, MVT::i1,  Promote);
+  setLoadExtAction(ISD::SEXTLOAD, MVT::i1,  Promote);
 
   // Used by legalize types to correctly generate the setcc result. 
   // Without this, every float setcc comes with a AND/OR with the result, 
@@ -155,7 +152,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
 }
 
 
-MVT MipsTargetLowering::getSetCCResultType(const SDValue &) const {
+MVT MipsTargetLowering::getSetCCResultType(MVT VT) const {
   return MVT::i32;
 }
 
@@ -215,11 +212,11 @@ bool MipsTargetLowering::IsGlobalInSmallSection(GlobalValue *GV)
     return false;
   
   const Type *Ty = GV->getType()->getElementType();
-  unsigned Size = TD->getABITypeSize(Ty);
+  unsigned Size = TD->getTypePaddedSize(Ty);
 
   // if this is a internal constant string, there is a special
   // section for it, but not in small data/bss.
-  if (GVA->hasInitializer() && GV->hasInternalLinkage()) {
+  if (GVA->hasInitializer() && GV->hasLocalLinkage()) {
     Constant *C = GVA->getInitializer();
     const ConstantArray *CVA = dyn_cast<ConstantArray>(C);
     if (CVA && CVA->isCString()) 
@@ -492,7 +489,7 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
     SDValue ResNode = DAG.getLoad(MVT::i32, DAG.getEntryNode(), GA, NULL, 0);
     // On functions and global targets not internal linked only
     // a load from got/GP is necessary for PIC to work.
-    if (!GV->hasInternalLinkage() || isa<Function>(GV))
+    if (!GV->hasLocalLinkage() || isa<Function>(GV))
       return ResNode;
     SDValue Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
     return DAG.getNode(ISD::ADD, MVT::i32, ResNode, Lo);
@@ -546,7 +543,7 @@ LowerConstantPool(SDValue Op, SelectionDAG &DAG)
   // hacking it. This feature should come soon so we can uncomment the 
   // stuff below.
   //if (!Subtarget->hasABICall() &&  
-  //    IsInSmallSection(getTargetData()->getABITypeSize(C->getType()))) {
+  //    IsInSmallSection(getTargetData()->getTypePaddedSize(C->getType()))) {
   //  SDValue GPRelNode = DAG.getNode(MipsISD::GPRel, MVT::i32, CP);
   //  SDValue GOT = DAG.getNode(ISD::GLOBAL_OFFSET_TABLE, MVT::i32);
   //  ResNode = DAG.getNode(ISD::ADD, MVT::i32, GOT, GPRelNode); 
@@ -576,9 +573,8 @@ LowerConstantPool(SDValue Op, SelectionDAG &DAG)
 //                  CALL Calling Convention Implementation
 //===----------------------------------------------------------------------===//
 
-/// LowerCCCCallTo - functions arguments are copied from virtual
-/// regs to (physical regs)/(stack frame), CALLSEQ_START and
-/// CALLSEQ_END are emitted.
+/// LowerCALL - functions arguments are copied from virtual regs to 
+/// (physical regs)/(stack frame), CALLSEQ_START and CALLSEQ_END are emitted.
 /// TODO: isVarArg, isTailCall.
 SDValue MipsTargetLowering::
 LowerCALL(SDValue Op, SelectionDAG &DAG)
@@ -608,8 +604,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
   
   // Get a count of how many bytes are to be pushed on the stack.
   unsigned NumBytes = CCInfo.getNextStackOffset();
-  Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, 
-                                 getPointerTy()));
+  Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true));
 
   // With EABI is it possible to have 16 args on registers.
   SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass;
@@ -715,10 +710,8 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
   InFlag = Chain.getValue(1);
 
   // Create the CALLSEQ_END node.
-  Chain = DAG.getCALLSEQ_END(Chain,
-                             DAG.getConstant(NumBytes, getPointerTy()),
-                             DAG.getConstant(0, getPointerTy()),
-                             InFlag);
+  Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
+                             DAG.getIntPtrConstant(0, true), InFlag);
   InFlag = Chain.getValue(1);
 
   // Create a stack location to hold GP when PIC is used. This stack 
@@ -784,8 +777,8 @@ LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
   ResultVals.push_back(Chain);
 
   // Merge everything together with a MERGE_VALUES node.
-  return DAG.getMergeValues(TheCall->getVTList(), &ResultVals[0],
-                            ResultVals.size()).getNode();
+  return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(),
+                     &ResultVals[0], ResultVals.size()).getNode();
 }
 
 //===----------------------------------------------------------------------===//
@@ -927,8 +920,8 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
   ArgValues.push_back(Root);
 
   // Return the new list of results.
-  return DAG.getMergeValues(Op.getNode()->getVTList(), &ArgValues[0],
-                            ArgValues.size()).getValue(Op.getResNo());
+  return DAG.getNode(ISD::MERGE_VALUES, Op.getNode()->getVTList(),
+                     &ArgValues[0], ArgValues.size()).getValue(Op.getResNo());
 }
 
 //===----------------------------------------------------------------------===//
@@ -1100,3 +1093,9 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
   }
   return std::vector<unsigned>();
 }
+
+bool
+MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
+  // The Mips target isn't yet aware of offsets.
+  return false;
+}