s/std::vector/SmallVector/

[oota-llvm.git] / lib / Target / Mips / MipsInstrFormats.td

diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td
index f82c3f575fa2d88aa72dca153fc07a3ed06336a7..98ae2fa7da4563c4c42523492db8889c9a46e7b6 100644 (file)
--- a/lib/Target/Mips/MipsInstrFormats.td
+++ b/lib/Target/Mips/MipsInstrFormats.td
@@ -1,4 +1,4 @@
-//===- MipsRegisterInfo.td - Mips Register defs -----------------*- C++ -*-===//
+//===- MipsRegisterInfo.td - Mips Register defs ------------*- tablegen -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -104,7 +104,7 @@ class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
 
 //===----------------------------------------------------------------------===//
 //
-//  FLOAT POINT INSTRUCTION FORMATS
+//  FLOATING POINT INSTRUCTION FORMATS
 //
 //  opcode  - operation code.
 //  fs      - src reg.
@@ -120,8 +120,8 @@ class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
 //===----------------------------------------------------------------------===//
 
 class FFR<bits<6> op, bits<6> _funct, bits<5> _fmt, dag outs, dag ins, 
-          string asmstr, list<dag> pattern, InstrItinClass itin> : 
-          MipsInst<outs, ins, asmstr, pattern, itin> 
+          string asmstr, list<dag> pattern> : 
+          MipsInst<outs, ins, asmstr, pattern, NoItinerary> 
 {
   bits<5>  fd;
   bits<5>  fs;
@@ -141,21 +141,42 @@ class FFR<bits<6> op, bits<6> _funct, bits<5> _fmt, dag outs, dag ins,
 }
 
 //===----------------------------------------------------------------------===//
-// Format FI instruction class in Mips : <|opcode|fmt|ft|immediate|>
+// Format FI instruction class in Mips : <|opcode|base|ft|immediate|>
 //===----------------------------------------------------------------------===//
 
-class FFI<bits<6> op, bits<5> _fmt, dag outs, dag ins, string asmstr, 
-          list<dag> pattern, InstrItinClass itin>: 
-          MipsInst<outs, ins, asmstr, pattern, itin> 
+class FFI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>: 
+          MipsInst<outs, ins, asmstr, pattern, NoItinerary> 
 {
   bits<5>  ft;
-  bits<5>  fmt;
+  bits<5>  base;
   bits<16> imm16;
 
   let opcode = op;
+
+  let Inst{25-21} = base;
+  let Inst{20-16} = ft; 
+  let Inst{15-0}  = imm16;
+}
+
+//===----------------------------------------------------------------------===//
+// Compare instruction class in Mips : <|010001|fmt|ft|fs|0000011|condcode|>
+//===----------------------------------------------------------------------===//
+
+class FCC<bits<5> _fmt, dag outs, dag ins, string asmstr, list<dag> pattern> : 
+          MipsInst<outs, ins, asmstr, pattern, NoItinerary> 
+{
+  bits<5>  fs;
+  bits<5>  ft;
+  bits<4>  cc;
+  bits<5>  fmt;
+
+  let opcode = 0x11;
   let fmt    = _fmt;
 
   let Inst{25-21} = fmt;
   let Inst{20-16} = ft; 
-  let Inst{15-0}  = imm16;
+  let Inst{15-11} = fs;
+  let Inst{10-6}  = 0;
+  let Inst{5-4}   = 0b11;
+  let Inst{3-0}   = cc;
 }