[], IIAlu>;
// Memory Load/Store
-let isSimpleLoad = 1, hasDelaySlot = 1 in
+let canFoldAsLoad = 1, hasDelaySlot = 1 in
class LoadM<bits<6> op, string instr_asm, PatFrag OpNode>:
FI< op,
(outs CPURegs:$dst),
let Defs = [SP], Uses = [SP] in {
def ADJCALLSTACKDOWN : MipsPseudo<(outs), (ins uimm16:$amt),
"!ADJCALLSTACKDOWN $amt",
- [(callseq_start imm:$amt)]>;
+ [(callseq_start timm:$amt)]>;
def ADJCALLSTACKUP : MipsPseudo<(outs), (ins uimm16:$amt1, uimm16:$amt2),
"!ADJCALLSTACKUP $amt1",
- [(callseq_end imm:$amt1, imm:$amt2)]>;
+ [(callseq_end timm:$amt1, timm:$amt2)]>;
}
// Some assembly macros need to avoid pseudoinstructions and assembler
/// Sign Ext In Register Instructions.
let Predicates = [HasSEInReg] in {
- let shamt = 0x10, rs = 0 in
+ let shamt = 0x10, rs = 0 in
def SEB : SignExtInReg<0x21, "seb", i8>;
- let shamt = 0x18, rs = 0 in
+ let shamt = 0x18, rs = 0 in
def SEH : SignExtInReg<0x20, "seh", i16>;
}