[ARM] Fix Tag_ABI_HardFP_use build attribute

[oota-llvm.git] / lib / Target / Mips / MipsMSAInstrFormats.td

diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td
index 6e5a5eaf3137750526fe72616bb91ef16724ac28..875dc0b4034d7310906b82df1e4c2ad1c3d23e4b 100644 (file)
--- a/lib/Target/Mips/MipsMSAInstrFormats.td
+++ b/lib/Target/Mips/MipsMSAInstrFormats.td
@@ -15,6 +15,14 @@ class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
   let Inst{31-26} = 0b011110;
 }
 
+class MSACBranch : MSAInst {
+  let Inst{31-26} = 0b010001;
+}
+
+class MSASpecial : MSAInst {
+  let Inst{31-26} = 0b000000;
+}
+
 class PseudoMSA<dag outs, dag ins, list<dag> pattern,
                 InstrItinClass itin = IIPseudo>:
   MipsPseudo<outs, ins, pattern, itin> {
@@ -331,11 +339,27 @@ class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst {
 }
 
 class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
+  bits<10> s10;
+  bits<5> wd;
+
   let Inst{25-23} = major;
   let Inst{22-21} = df;
+  let Inst{20-11} = s10;
+  let Inst{10-6} = wd;
   let Inst{5-0} = minor;
 }
 
+class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst {
+  bits<21> addr;
+  bits<5> wd;
+
+  let Inst{25-16} = addr{9-0};
+  let Inst{15-11} = addr{20-16};
+  let Inst{10-6} = wd;
+  let Inst{5-2} = minor;
+  let Inst{1-0} = df;
+}
+
 class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
   bits<5> wt;
   bits<5> ws;
@@ -348,13 +372,35 @@ class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
   let Inst{5-0} = minor;
 }
 
-class MSA_VECS10_FMT<bits<5> major, bits<6> minor>: MSAInst {
+class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch {
+  bits<16> offset;
+  bits<5> wt;
+
+  let Inst{25-23} = major;
+  let Inst{22-21} = df;
+  let Inst{20-16} = wt;
+  let Inst{15-0} = offset;
+}
+
+class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
+  bits<16> offset;
+  bits<5> wt;
+
   let Inst{25-21} = major;
-  let Inst{5-0} = minor;
+  let Inst{20-16} = wt;
+  let Inst{15-0} = offset;
 }
 
-class SPECIAL_LSA_FMT: MSAInst {
-  let Inst{25-21} = 0b000000;
+class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
+  bits<5> rs;
+  bits<5> rt;
+  bits<5> rd;
+  bits<2> sa;
+
+  let Inst{25-21} = rs;
+  let Inst{20-16} = rt;
+  let Inst{15-11} = rd;
   let Inst{10-8} = 0b000;
-  let Inst{5-0} = 0b000101;
+  let Inst{7-6} = sa;
+  let Inst{5-0} = minor;
 }