//===----------------------------------------------------------------------===//
#include "MipsMachineFunction.h"
+#include "MCTargetDesc/MipsBaseInfo.h"
#include "MipsInstrInfo.h"
#include "MipsSubtarget.h"
-#include "MCTargetDesc/MipsBaseInfo.h"
-#include "llvm/Function.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
using namespace llvm;
FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
cl::desc("Always use $gp as the global base register."));
-bool MipsFunctionInfo::globalBaseRegFixed() const {
- return FixGlobalBaseReg;
-}
-
bool MipsFunctionInfo::globalBaseRegSet() const {
return GlobalBaseReg;
}
const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
- if (FixGlobalBaseReg && ST.isABI_O32()) // $gp is the global base register.
- return GlobalBaseReg = Mips::GP;
+ const TargetRegisterClass *RC;
+ if (ST.inMips16Mode())
+ RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
+ else
+ RC = ST.isABI_N64() ?
+ (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
+ (const TargetRegisterClass*)&Mips::CPURegsRegClass;
+ return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
+}
- const TargetRegisterClass *RC = ST.isABI_N64() ?
- (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
- (const TargetRegisterClass*)&Mips::CPURegsRegClass;
+bool MipsFunctionInfo::mips16SPAliasRegSet() const {
+ return Mips16SPAliasReg;
+}
+unsigned MipsFunctionInfo::getMips16SPAliasReg() {
+ // Return if it has already been initialized.
+ if (Mips16SPAliasReg)
+ return Mips16SPAliasReg;
- return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
+ const TargetRegisterClass *RC;
+ RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
+ return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
}
void MipsFunctionInfo::anchor() { }