//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Bruno Cardoso Lopes and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// This file contains the MIPS implementation of the MRegisterInfo class.
+// This file contains the MIPS implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
: MipsGenRegisterInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
TII(tii) {}
-void MipsRegisterInfo::
-storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned SrcReg, int FI,
- const TargetRegisterClass *RC) const
-{
- if (RC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::SW)).addReg(SrcReg, false, false, true)
- .addImm(0).addFrameIndex(FI);
- else
- assert(0 && "Can't store this register to stack slot");
-}
-
-void MipsRegisterInfo::
-loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DestReg, int FI,
- const TargetRegisterClass *RC) const
-{
- if (RC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::LW), DestReg).addImm(0).addFrameIndex(FI);
- else
- assert(0 && "Can't load this register from stack slot");
-}
-
-void MipsRegisterInfo::
-copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const
+/// getRegisterNumbering - Given the enum value for some register, e.g.
+/// Mips::RA, return the number that it corresponds to (e.g. 31).
+unsigned MipsRegisterInfo::
+getRegisterNumbering(unsigned RegEnum)
{
- if (RC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::ADDu), DestReg).addReg(Mips::ZERO)
- .addReg(SrcReg);
- else
- assert (0 && "Can't copy this register");
+ switch (RegEnum) {
+ case Mips::ZERO : return 0;
+ case Mips::AT : return 1;
+ case Mips::V0 : return 2;
+ case Mips::V1 : return 3;
+ case Mips::A0 : return 4;
+ case Mips::A1 : return 5;
+ case Mips::A2 : return 6;
+ case Mips::A3 : return 7;
+ case Mips::T0 : return 8;
+ case Mips::T1 : return 9;
+ case Mips::T2 : return 10;
+ case Mips::T3 : return 11;
+ case Mips::T4 : return 12;
+ case Mips::T5 : return 13;
+ case Mips::T6 : return 14;
+ case Mips::T7 : return 15;
+ case Mips::T8 : return 16;
+ case Mips::T9 : return 17;
+ case Mips::S0 : return 18;
+ case Mips::S1 : return 19;
+ case Mips::S2 : return 20;
+ case Mips::S3 : return 21;
+ case Mips::S4 : return 22;
+ case Mips::S5 : return 23;
+ case Mips::S6 : return 24;
+ case Mips::S7 : return 25;
+ case Mips::K0 : return 26;
+ case Mips::K1 : return 27;
+ case Mips::GP : return 28;
+ case Mips::SP : return 29;
+ case Mips::FP : return 30;
+ case Mips::RA : return 31;
+ default: assert(0 && "Unknown register number!");
+ }
}
void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
MBB.insert(I, MI);
}
-MachineInstr *MipsRegisterInfo::
-foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FI) const
-{
- MachineInstr *NewMI = NULL;
-
- switch (MI->getOpcode())
- {
- case Mips::ADDu:
- if ((MI->getOperand(0).isRegister()) &&
- (MI->getOperand(1).isRegister()) &&
- (MI->getOperand(1).getReg() == Mips::ZERO) &&
- (MI->getOperand(2).isRegister()))
- {
- if (OpNum == 0) // COPY -> STORE
- NewMI = BuildMI(TII.get(Mips::SW)).addFrameIndex(FI)
- .addImm(0).addReg(MI->getOperand(2).getReg());
- else // COPY -> LOAD
- NewMI = BuildMI(TII.get(Mips::LW), MI->getOperand(0)
- .getReg()).addImm(0).addFrameIndex(FI);
- }
- break;
- }
-
- if (NewMI)
- NewMI->copyKillDeadInfo(MI);
- return NewMI;
-}
+//===----------------------------------------------------------------------===//
+//
+// Callee Saved Registers methods
+//
+//===----------------------------------------------------------------------===//
/// Mips Callee Saved Registers
const unsigned* MipsRegisterInfo::
// Stack Frame Processing methods
// +----------------------------+
//
-// Too meet ABI, we construct the frame on the reverse
-// of natural order.
-//
-// The LLVM Frame will look like this:
-//
-// As the stack grows down, we start at 0, and the reference
-// is decrement.
+// The stack is allocated decrementing the stack pointer on
+// the first instruction of a function prologue. Once decremented,
+// all stack referencesare are done thought a positive offset
+// from the stack/frame pointer, so the stack is considering
+// to grow up! Otherwise terrible hacks would have to be made
+// to get this stack ABI compliant :)
//
-// 0 ----------
-// -4 Args to pass
-// . saved "Callee Saved" Registers
-// . Local Area
-// . saved FP
-// . saved RA
-// -StackSize -----------
+// The stack frame required by the ABI:
+// Offset
//
-// On the EliminateFrameIndex we just negate the address above
-// and we get the stack frame required by the ABI, which is:
+// 0 ----------
+// 4 Args to pass
+// . saved $GP (used in PIC - not supported yet)
+// . Local Area
+// . saved "Callee Saved" Registers
+// . saved FP
+// . saved RA
+// StackSize -----------
//
-// sp + stacksize -------------
-// saved $RA (only on non-leaf functions)
-// saved $FP (only with frame pointer)
-// saved "Callee Saved" Registers
-// Local Area
-// saved $GP (used in PIC - not supported yet)
-// Args to pass area
-// sp -------------
+// Offset - offset from sp after stack allocation on function prologue
//
// The sp is the stack pointer subtracted/added from the stack size
// at the Prologue/Epilogue
//
// References to the previous stack (to obtain arguments) are done
-// with fixed location stack frames using positive stack offsets.
+// with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
//
// Examples:
// - reference to the actual stack frame
-// for any local area var there is smt like : FI >= 0, StackOffset: -4
-// sw REGX, 4(REGY)
+// for any local area var there is smt like : FI >= 0, StackOffset: 4
+// sw REGX, 4(SP)
//
// - reference to previous stack frame
-// suppose there's a store to the 5th arguments : FI < 0, StackOffset: 16.
+// suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
// The emitted instruction will be something like:
-// sw REGX, 16+StackSize (REGY)
+// lw REGX, 16+StackSize(SP)
+//
+// Since the total stack size is unknown on LowerFORMAL_ARGUMENTS, all
+// stack references (ObjectOffset) created to reference the function
+// arguments, are negative numbers. This way, on eliminateFrameIndex it's
+// possible to detect those references and the offsets are adjusted to
+// their real location.
+//
+//
//
//===----------------------------------------------------------------------===//
eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
RegScavenger *RS) const
{
- MachineInstr &MI = *II;
+ MachineInstr &MI = *II;
MachineFunction &MF = *MI.getParent()->getParent();
unsigned i = 0;
"Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
int stackSize = MF.getFrameInfo()->getStackSize();
int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
DOUT << "stackSize : " << stackSize << "\n";
#endif
- int Offset = ( (spOffset >= 0) ? (stackSize + spOffset) : (-spOffset));
+ // as explained on LowerFORMAL_ARGUMENTS, detect negative offsets
+ // and adjust SPOffsets considering the final stack size.
+ int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset));
+ Offset += MI.getOperand(i-1).getImm();
#ifndef NDEBUG
DOUT << "Offset : " << Offset << "\n";
#endif
MI.getOperand(i-1).ChangeToImmediate(Offset);
- MI.getOperand(i).ChangeToRegister(getFrameRegister(MF),false);
+ MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
}
void MipsRegisterInfo::
MachineFrameInfo *MFI = MF.getFrameInfo();
MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
MachineBasicBlock::iterator MBBI = MBB.begin();
+ bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
+
+ // Replace the dummy '0' SPOffset by the negative
+ // offsets, as explained on LowerFORMAL_ARGUMENTS
+ MipsFI->adjustLoadArgsFI(MFI);
+ MipsFI->adjustStoreVarArgsFI(MFI);
// Get the number of bytes to allocate from the FrameInfo.
int NumBytes = (int) MFI->getStackSize();
#ifndef NDEBUG
DOUT << "\n<--- EMIT PROLOGUE --->\n";
- DOUT << "Stack size :" << NumBytes << "\n";
+ DOUT << "Actual Stack size :" << NumBytes << "\n";
#endif
- // Don't need to allocate space on the stack.
+ // No need to allocate space on the stack.
if (NumBytes == 0) return;
int FPOffset, RAOffset;
- // Always allocate space for saved RA and FP,
- // even if FramePointer is not used. When not
- // using FP, the last stack slot becomes empty
- // and RA is saved before it.
+ // Allocate space for saved RA and FP when needed
if ((hasFP(MF)) && (MFI->hasCalls())) {
- FPOffset = NumBytes+4;
- RAOffset = (NumBytes+8);
+ FPOffset = NumBytes;
+ RAOffset = (NumBytes+4);
+ NumBytes += 8;
} else if ((!hasFP(MF)) && (MFI->hasCalls())) {
FPOffset = 0;
- RAOffset = NumBytes+4;
+ RAOffset = NumBytes;
+ NumBytes += 4;
} else if ((hasFP(MF)) && (!MFI->hasCalls())) {
- FPOffset = NumBytes+4;
+ FPOffset = NumBytes;
RAOffset = 0;
+ NumBytes += 4;
+ } else {
+ // No calls and no fp.
+ RAOffset = FPOffset = 0;
}
- MFI->setObjectOffset(MFI->CreateStackObject(4,4), -FPOffset);
- MFI->setObjectOffset(MFI->CreateStackObject(4,4), -RAOffset);
+ MFI->setObjectOffset(MFI->CreateStackObject(4,4), FPOffset);
+ MFI->setObjectOffset(MFI->CreateStackObject(4,4), RAOffset);
MipsFI->setFPStackOffset(FPOffset);
MipsFI->setRAStackOffset(RAOffset);
- #ifndef NDEBUG
- DOUT << "FPOffset :" << FPOffset << "\n";
- DOUT << "RAOffset :" << RAOffset << "\n";
- #endif
-
// Align stack.
- NumBytes += 12;
unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
NumBytes = ((NumBytes+Align-1)/Align*Align);
#ifndef NDEBUG
+ DOUT << "FPOffset :" << FPOffset << "\n";
+ DOUT << "RAOffset :" << RAOffset << "\n";
DOUT << "New stack size :" << NumBytes << "\n\n";
#endif
// Update frame info
MFI->setStackSize(NumBytes);
+ // PIC speficic function prologue
+ if (isPIC)
+ BuildMI(MBB, MBBI, TII.get(Mips::CPLOAD)).addReg(Mips::T9);
+
// Adjust stack : addi sp, sp, (-imm)
BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
.addReg(Mips::SP).addImm(-NumBytes);
BuildMI(MBB, MBBI, TII.get(Mips::ADDu), Mips::FP)
.addReg(Mips::SP).addReg(Mips::ZERO);
}
+
+ // PIC speficic function prologue
+ if ((isPIC) && (MFI->hasCalls()))
+ BuildMI(MBB, MBBI, TII.get(Mips::CPRESTORE))
+ .addImm(MipsFI->getGPStackOffset());
}
void MipsRegisterInfo::
int FPOffset = MipsFI->getFPStackOffset();
int RAOffset = MipsFI->getRAStackOffset();
- #ifndef NDEBUG
- DOUT << "\n<--- EMIT EPILOGUE --->" << "\n";
- DOUT << "Stack size :" << NumBytes << "\n";
- DOUT << "FPOffset :" << FPOffset << "\n";
- DOUT << "RAOffset :" << RAOffset << "\n\n";
- #endif
-
// if framepointer enabled, restore it and restore the
// stack pointer
if (hasFP(MF)) {
void MipsRegisterInfo::
processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
+ // Set the SPOffset on the FI where GP must be saved/loaded.
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ if (MFI->hasCalls()) {
+ MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
+ #ifndef NDEBUG
+ DOUT << "processFunctionBeforeFrameFinalized\n";
+ DOUT << "GPOffset :" << MipsFI->getGPStackOffset() << "\n";
+ DOUT << "FI :" << MipsFI->getGPFI() << "\n";
+ #endif
+ MFI->setObjectOffset(MipsFI->getGPFI(), MipsFI->getGPStackOffset());
+ }
}
unsigned MipsRegisterInfo::
return 0;
}
+int MipsRegisterInfo::
+getDwarfRegNum(unsigned RegNum, bool isEH) const {
+ assert(0 && "What is the dwarf register number");
+ return -1;
+}
+
#include "MipsGenRegisterInfo.inc"
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