//
// The LLVM Compiler Infrastructure
//
-// This file was developed by Bruno Cardoso Lopes and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// This file contains the MIPS implementation of the MRegisterInfo class.
+// This file contains the MIPS implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
case Mips::RA : return 31;
default: assert(0 && "Unknown register number!");
}
-}
-
-void MipsRegisterInfo::
-storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned SrcReg, int FI,
- const TargetRegisterClass *RC) const
-{
- if (RC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::SW)).addReg(SrcReg, false, false, true)
- .addImm(0).addFrameIndex(FI);
- else
- assert(0 && "Can't store this register to stack slot");
-}
-
-void MipsRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
- SmallVector<MachineOperand,4> Addr,
- const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
- if (RC != Mips::CPURegsRegisterClass)
- assert(0 && "Can't store this register");
- MachineInstrBuilder MIB = BuildMI(TII.get(Mips::SW))
- .addReg(SrcReg, false, false, true);
- for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
- MachineOperand &MO = Addr[i];
- if (MO.isRegister())
- MIB.addReg(MO.getReg());
- else if (MO.isImmediate())
- MIB.addImm(MO.getImmedValue());
- else
- MIB.addFrameIndex(MO.getFrameIndex());
- }
- NewMIs.push_back(MIB);
- return;
-}
-
-void MipsRegisterInfo::
-loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DestReg, int FI,
- const TargetRegisterClass *RC) const
-{
- if (RC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::LW), DestReg).addImm(0).addFrameIndex(FI);
- else
- assert(0 && "Can't load this register from stack slot");
-}
-
-void MipsRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
- SmallVector<MachineOperand,4> Addr,
- const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
- if (RC != Mips::CPURegsRegisterClass)
- assert(0 && "Can't load this register");
- MachineInstrBuilder MIB = BuildMI(TII.get(Mips::LW), DestReg);
- for (unsigned i = 0, e = Addr.size(); i != e; ++i) {
- MachineOperand &MO = Addr[i];
- if (MO.isRegister())
- MIB.addReg(MO.getReg());
- else if (MO.isImmediate())
- MIB.addImm(MO.getImmedValue());
- else
- MIB.addFrameIndex(MO.getFrameIndex());
- }
- NewMIs.push_back(MIB);
- return;
-}
-
-void MipsRegisterInfo::
-copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *DestRC,
- const TargetRegisterClass *SrcRC) const
-{
- if (DestRC != SrcRC) {
- cerr << "Not yet supported!";
- abort();
- }
-
- if (DestRC == Mips::CPURegsRegisterClass)
- BuildMI(MBB, I, TII.get(Mips::ADDu), DestReg).addReg(Mips::ZERO)
- .addReg(SrcReg);
- else
- assert (0 && "Can't copy this register");
-}
-
-void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator I,
- unsigned DestReg,
- const MachineInstr *Orig) const
-{
- MachineInstr *MI = Orig->clone();
- MI->getOperand(0).setReg(DestReg);
- MBB.insert(I, MI);
-}
-
-MachineInstr *MipsRegisterInfo::
-foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FI) const
-{
- MachineInstr *NewMI = NULL;
-
- switch (MI->getOpcode())
- {
- case Mips::ADDu:
- if ((MI->getOperand(0).isRegister()) &&
- (MI->getOperand(1).isRegister()) &&
- (MI->getOperand(1).getReg() == Mips::ZERO) &&
- (MI->getOperand(2).isRegister()))
- {
- if (OpNum == 0) // COPY -> STORE
- NewMI = BuildMI(TII.get(Mips::SW)).addFrameIndex(FI)
- .addImm(0).addReg(MI->getOperand(2).getReg());
- else // COPY -> LOAD
- NewMI = BuildMI(TII.get(Mips::LW), MI->getOperand(0)
- .getReg()).addImm(0).addFrameIndex(FI);
- }
- break;
- }
-
- if (NewMI)
- NewMI->copyKillDeadInfo(MI);
- return NewMI;
+ return 0; // Not reached
}
//===----------------------------------------------------------------------===//
eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
RegScavenger *RS) const
{
- MachineInstr &MI = *II;
+ MachineInstr &MI = *II;
MachineFunction &MF = *MI.getParent()->getParent();
unsigned i = 0;
"Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
int stackSize = MF.getFrameInfo()->getStackSize();
int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
#endif
MI.getOperand(i-1).ChangeToImmediate(Offset);
- MI.getOperand(i).ChangeToRegister(getFrameRegister(MF),false);
+ MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
}
void MipsRegisterInfo::
FPOffset = NumBytes;
RAOffset = 0;
NumBytes += 4;
+ } else {
+ // No calls and no fp.
+ RAOffset = FPOffset = 0;
}
MFI->setObjectOffset(MFI->CreateStackObject(4,4), FPOffset);
if ((isPIC) && (MFI->hasCalls()))
BuildMI(MBB, MBBI, TII.get(Mips::CPRESTORE))
.addImm(MipsFI->getGPStackOffset());
-
}
void MipsRegisterInfo::
void MipsRegisterInfo::
processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
+ // Set the SPOffset on the FI where GP must be saved/loaded.
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ if (MFI->hasCalls()) {
+ MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
+ #ifndef NDEBUG
+ DOUT << "processFunctionBeforeFrameFinalized\n";
+ DOUT << "GPOffset :" << MipsFI->getGPStackOffset() << "\n";
+ DOUT << "FI :" << MipsFI->getGPFI() << "\n";
+ #endif
+ MFI->setObjectOffset(MipsFI->getGPFI(), MipsFI->getGPStackOffset());
+ }
}
unsigned MipsRegisterInfo::
return 0;
}
+int MipsRegisterInfo::
+getDwarfRegNum(unsigned RegNum, bool isEH) const {
+ assert(0 && "What is the dwarf register number");
+ return -1;
+}
+
#include "MipsGenRegisterInfo.inc"
projects / oota-llvm.git / blobdiff