Fix a ValueTracking rule: RHS means operand 1, not 0. Add a simple

[oota-llvm.git] / lib / Target / Mips / MipsSubtarget.cpp

diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp
index 29d869b8bd3210b63e4d499382194f6f6ca99a1a..48f58a55aadafbdbbbd0d8bed77c805aab4d0ea0 100644 (file)
--- a/lib/Target/Mips/MipsSubtarget.cpp
+++ b/lib/Target/Mips/MipsSubtarget.cpp
@@ -18,13 +18,16 @@
 #include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
-cl::opt<bool> NotABICall("disable-mips-abicall", cl::Hidden,
-              cl::desc("Disable code for SVR4-style dynamic objects"));
-cl::opt<bool> AbsoluteCall("enable-mips-absolute-call", cl::Hidden,
-              cl::desc("Enable absolute call within abicall"));
-cl::opt<unsigned> SSThreshold("mips-ssection-threshold", cl::Hidden,
-              cl::desc("Small data and bss section threshold size (default=8)"),
-              cl::init(8));
+static cl::opt<bool>
+NotABICall("disable-mips-abicall", cl::Hidden,
+           cl::desc("Disable code for SVR4-style dynamic objects"));
+static cl::opt<bool>
+AbsoluteCall("enable-mips-absolute-call", cl::Hidden,
+             cl::desc("Enable absolute call within abicall"));
+static cl::opt<unsigned>
+SSThreshold("mips-ssection-threshold", cl::Hidden,
+            cl::desc("Small data and bss section threshold size (default=8)"),
+            cl::init(8));
 
 MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M, 
                              const std::string &FS, bool little) : 
@@ -50,17 +53,21 @@ MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M,
   // a allegrex target, set the features. We also match
   // big and little endian allegrex cores (dont really
   // know if a big one exists)
-  if (TT.find("mipsallegrex") != std::string::npos) {
+  if (TT.find("mipsallegrex") != std::string::npos ||
+      TT.find("psp") != std::string::npos) {
     MipsABI = EABI;
     IsSingleFloat = true;
     MipsArchVersion = Mips2;
     HasVFPU = true; // Enables Allegrex Vector FPU (not supported yet)
     HasSEInReg = true;
+    HasBitCount = true;
+    HasSwap = true;
+    HasCondMov = true;
   }
 
-  // Abicall is the default for O32 ABI and is ignored 
-  // for EABI.
-  if (NotABICall || isABI_EABI())
+  // Abicall is the default for O32 ABI, but is disabled within EABI and in
+  // static code.
+  if (NotABICall || isABI_EABI() || (TM.getRelocationModel() == Reloc::Static))
     HasABICall = false;
 
   // TODO: disable when handling 64 bit symbols in the future.