[mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=mips...

[oota-llvm.git] / lib / Target / Mips / MipsTargetMachine.h

diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h
index a542ef68209377438c6530eeadeea339c883a755..a5aa39bc9f4d37d22631c549c0ccce776bc2b13b 100644 (file)
--- a/lib/Target/Mips/MipsTargetMachine.h
+++ b/lib/Target/Mips/MipsTargetMachine.h
@@ -15,15 +15,16 @@
 #define MIPSTARGETMACHINE_H
 
 #include "MipsFrameLowering.h"
-#include "MipsInstrInfo.h"
 #include "MipsISelLowering.h"
+#include "MipsInstrInfo.h"
 #include "MipsJITInfo.h"
 #include "MipsSelectionDAGInfo.h"
 #include "MipsSubtarget.h"
-#include "MipsELFWriterInfo.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/TargetData.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/SelectionDAGISel.h"
+#include "llvm/IR/DataLayout.h"
 #include "llvm/Target/TargetFrameLowering.h"
+#include "llvm/Target/TargetMachine.h"
 
 namespace llvm {
 class formatted_raw_ostream;
@@ -31,13 +32,19 @@ class MipsRegisterInfo;
 
 class MipsTargetMachine : public LLVMTargetMachine {
   MipsSubtarget       Subtarget;
-  const TargetData    DataLayout; // Calculates type size & alignment
-  const MipsInstrInfo *InstrInfo;
-  const MipsFrameLowering *FrameLowering;
-  MipsTargetLowering  TLInfo;
+  const DataLayout    DL; // Calculates type size & alignment
+  std::unique_ptr<const MipsInstrInfo> InstrInfo;
+  std::unique_ptr<const MipsFrameLowering> FrameLowering;
+  std::unique_ptr<const MipsTargetLowering> TLInfo;
+  std::unique_ptr<const MipsInstrInfo> InstrInfo16;
+  std::unique_ptr<const MipsFrameLowering> FrameLowering16;
+  std::unique_ptr<const MipsTargetLowering> TLInfo16;
+  std::unique_ptr<const MipsInstrInfo> InstrInfoSE;
+  std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
+  std::unique_ptr<const MipsTargetLowering> TLInfoSE;
   MipsSelectionDAGInfo TSInfo;
+  const InstrItineraryData &InstrItins;
   MipsJITInfo JITInfo;
-  MipsELFWriterInfo   ELFWriterInfo;
 
 public:
   MipsTargetMachine(const Target &T, StringRef TT,
@@ -46,38 +53,47 @@ public:
                     CodeGenOpt::Level OL,
                     bool isLittle);
 
-  virtual ~MipsTargetMachine() { delete InstrInfo; }
+  virtual ~MipsTargetMachine() {}
 
-  virtual const MipsInstrInfo *getInstrInfo() const
-  { return InstrInfo; }
-  virtual const TargetFrameLowering *getFrameLowering() const
-  { return FrameLowering; }
-  virtual const MipsSubtarget *getSubtargetImpl() const
+  void addAnalysisPasses(PassManagerBase &PM) override;
+
+  const MipsInstrInfo *getInstrInfo() const override
+  { return InstrInfo.get(); }
+  const TargetFrameLowering *getFrameLowering() const override
+  { return FrameLowering.get(); }
+  const MipsSubtarget *getSubtargetImpl() const override
   { return &Subtarget; }
-  virtual const TargetData *getTargetData()    const
-  { return &DataLayout;}
-  virtual MipsJITInfo *getJITInfo()
-  { return &JITInfo; }
+  const DataLayout *getDataLayout()    const override
+  { return &DL;}
 
-  virtual const MipsRegisterInfo *getRegisterInfo()  const {
-    return &InstrInfo->getRegisterInfo();
+  const InstrItineraryData *getInstrItineraryData() const override {
+    return Subtarget.inMips16Mode() ? nullptr : &InstrItins;
   }
 
-  virtual const MipsTargetLowering *getTargetLowering() const {
-    return &TLInfo;
+  MipsJITInfo *getJITInfo() override { return &JITInfo; }
+
+  const MipsRegisterInfo *getRegisterInfo()  const override {
+    return &InstrInfo->getRegisterInfo();
   }
 
-  virtual const MipsSelectionDAGInfo* getSelectionDAGInfo() const {
-    return &TSInfo;
+  const MipsTargetLowering *getTargetLowering() const override {
+    return TLInfo.get();
   }
 
-  virtual const MipsELFWriterInfo *getELFWriterInfo() const {
-    return &ELFWriterInfo;
+  const MipsSelectionDAGInfo* getSelectionDAGInfo() const override {
+    return &TSInfo;
   }
 
   // Pass Pipeline Configuration
-  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
-  virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE);
+  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+  bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
+
+  // Set helper classes
+  void setHelperClassesMips16();
+
+  void setHelperClassesMipsSE();
+
+
 };
 
 /// MipsebTargetMachine - Mips32/64 big endian target machine.