Reapply [FastISel][X86] Add large code model support for materializing floating-point...

[oota-llvm.git] / lib / Target / NVPTX / NVPTXIntrinsics.td

diff --git a/lib/Target/NVPTX/NVPTXIntrinsics.td b/lib/Target/NVPTX/NVPTXIntrinsics.td
index 2c1e99c424994195ef6f1c04950c15b0227ffb23..14e51aa309ea3e6a2ddf3a25d56dc76d6bc5fbe4 100644 (file)
--- a/lib/Target/NVPTX/NVPTXIntrinsics.td
+++ b/lib/Target/NVPTX/NVPTXIntrinsics.td
@@ -799,6 +799,11 @@ def : Pat<(i16 (fp_to_f16 Float32Regs:$a)),
 def : Pat<(i16 (fp_to_f16 Float32Regs:$a)),
           (CVT_f16_f32 Float32Regs:$a, CvtRN)>;
 
+def : Pat<(f64 (f16_to_fp Int16Regs:$a)),
+          (CVT_f64_f16 Int16Regs:$a, CvtNONE)>;
+def : Pat<(i16 (fp_to_f16 Float64Regs:$a)),
+          (CVT_f16_f64 Float64Regs:$a, CvtRN)>;
+
 //
 // Bitcast
 //
@@ -4241,6 +4246,8 @@ def SULD_3D_V4I32_ZERO
 //-----------------------------------
 // Texture Query Intrinsics
 //-----------------------------------
+
+let IsSurfTexQuery = 1 in {
 def TXQ_CHANNEL_ORDER
   : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
               "txq.channel_order.b32 \t$d, [$a];",
@@ -4273,6 +4280,7 @@ def TXQ_NUM_MIPMAP_LEVELS
   : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
               "txq.num_mipmap_levels.b32 \t$d, [$a];",
               []>;
+}
 
 def : Pat<(int_nvvm_txq_channel_order Int64Regs:$a),
           (TXQ_CHANNEL_ORDER Int64Regs:$a)>;
@@ -4295,6 +4303,8 @@ def : Pat<(int_nvvm_txq_num_mipmap_levels Int64Regs:$a),
 //-----------------------------------
 // Surface Query Intrinsics
 //-----------------------------------
+
+let IsSurfTexQuery = 1 in {
 def SUQ_CHANNEL_ORDER
   : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
               "suq.channel_order.b32 \t$d, [$a];",
@@ -4319,6 +4329,7 @@ def SUQ_ARRAY_SIZE
   : NVPTXInst<(outs Int32Regs:$d), (ins Int64Regs:$a),
               "suq.array_size.b32 \t$d, [$a];",
               []>;
+}
 
 def : Pat<(int_nvvm_suq_channel_order Int64Regs:$a),
           (SUQ_CHANNEL_ORDER Int64Regs:$a)>;