Do not consider MMX_MOVD64rr a move instructions. The source register is in GR32...

[oota-llvm.git] / lib / Target / PIC16 / PIC16.td

diff --git a/lib/Target/PIC16/PIC16.td b/lib/Target/PIC16/PIC16.td
index 0ab4a3444f632a6eb303cb90cd69b21c5f9f95c0..b2b9b1cd171ee7697fb2d30cc8e7d7e4340c4085 100644 (file)
--- a/lib/Target/PIC16/PIC16.td
+++ b/lib/Target/PIC16/PIC16.td
@@ -13,32 +13,26 @@
 // Target-independent interfaces
 //===----------------------------------------------------------------------===//
 
-include "../Target.td"
-
-//===----------------------------------------------------------------------===//
-// Descriptions
-//===----------------------------------------------------------------------===//
+include "llvm/Target/Target.td"
 
 include "PIC16RegisterInfo.td"
-include "PIC16CallingConv.td"
 include "PIC16InstrInfo.td"
 
-def PIC16InstrInfo : InstrInfo {
-  let TSFlagsFields = [];
-  let TSFlagsShifts = [];
-}
-
-
-
-// Not currently supported, but work as SubtargetFeature placeholder.
-def FeaturePIC16Old : SubtargetFeature<"pic16old", "IsPIC16Old", "true",
-                                      "PIC16 Old ISA Support">;
+//===----------------------------------------------------------------------===//
+// Subtarget Features. 
+//===----------------------------------------------------------------------===//
+def FeatureCooper : SubtargetFeature<"cooper", "IsCooper", "true",
+                                     "PIC16 Cooper ISA Support">;
 
 //===----------------------------------------------------------------------===//
-// PIC16 processors supported.
+// PIC16 supported processors.
 //===----------------------------------------------------------------------===//
 
 def : Processor<"generic", NoItineraries, []>;
+def : Processor<"cooper", NoItineraries, [FeatureCooper]>;
+
+
+def PIC16InstrInfo : InstrInfo {} 
 
 def PIC16 : Target {
   let InstructionSet = PIC16InstrInfo;