New feature: add support for target intrinsics being defined in the

[oota-llvm.git] / lib / Target / PIC16 / PIC16ISelLowering.cpp

diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index ae031bc646938247a0afcc27abebdfd914cce38a..80c8f99ce73ed97415d3fc51ac84e87832c74f53 100644 (file)
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -172,7 +172,7 @@ SDValue
 PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
                                       MVT RetVT, const SDValue *Ops,
                                       unsigned NumOps, bool isSigned,
-                                      SelectionDAG &DAG) {
+                                      SelectionDAG &DAG, DebugLoc dl) {
 
  TargetLowering::ArgListTy Args;
  Args.reserve(NumOps);
@@ -190,7 +190,7 @@ PIC16TargetLowering::MakePIC16Libcall(PIC16ISD::PIC16Libcall Call,
   const Type *RetTy = RetVT.getTypeForMVT();
   std::pair<SDValue,SDValue> CallInfo = 
      LowerCallTo(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
-                     false, CallingConv::C, false, Callee, Args, DAG);
+                     false, CallingConv::C, false, Callee, Args, DAG, dl);
 
   return CallInfo.first;
 }
@@ -758,7 +758,8 @@ SDValue PIC16TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
   SmallVector<SDValue, 2> Ops(2);
   Ops[0] = Value;
   Ops[1] = Amt;
-  SDValue Call = MakePIC16Libcall(CallCode, N->getValueType(0), &Ops[0], 2, true, DAG);
+  SDValue Call = MakePIC16Libcall(CallCode, N->getValueType(0), &Ops[0], 2, 
+                                  true, DAG, N->getDebugLoc());
   return Call;
 }
 
@@ -1004,9 +1005,9 @@ SDValue PIC16TargetLowering::LowerCALL(SDValue Op, SelectionDAG &DAG) {
 
       SDVTList VTs = DAG.getVTList(&NodeTys[0], NodeTys.size());
       SDValue NewCall = 
-              DAG.getCall(TheCall->getCallingConv(), TheCall->isVarArg(), 
-                          TheCall->isTailCall(), TheCall->isInreg(), VTs, 
-                          &Ops[0], Ops.size());
+              DAG.getCall(TheCall->getCallingConv(), TheCall->getDebugLoc(),
+                          TheCall->isVarArg(), TheCall->isTailCall(), 
+                          TheCall->isInreg(), VTs, &Ops[0], Ops.size());
 
       return NewCall;
     }
@@ -1288,23 +1289,25 @@ SDValue PIC16TargetLowering::getPIC16Cmp(SDValue LHS, SDValue RHS,
   }
 
   PIC16CC = DAG.getConstant(CondCode, MVT::i8);
-  SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Flag);
 
   // These are signed comparisons. 
   SDValue Mask = DAG.getConstant(128, MVT::i8);
   if (isSignedComparison(CondCode)) {
-    LHS = DAG.getNode (ISD::XOR, MVT::i8, LHS, Mask); 
+    LHS = DAG.getNode (ISD::XOR, MVT::i8, LHS, Mask);
     RHS = DAG.getNode (ISD::XOR, MVT::i8, RHS, Mask); 
   }
+
+  SDVTList VTs = DAG.getVTList (MVT::i8, MVT::Flag);
   // We can use a subtract operation to set the condition codes. But
   // we need to put one operand in memory if required.
-  // Nothing to do if the first operand is already a direct load and it has
-  // only one use.
-  if (! (isDirectLoad(LHS) && LHS.hasOneUse()))
-    // Put first operand on stack.
-    LHS = ConvertToMemOperand (LHS, DAG);
-
-  SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
+  // Nothing to do if the first operand is already a valid type (direct load 
+  // for subwf and literal for sublw) and it is used by this operation only. 
+  if ((LHS.getOpcode() == ISD::Constant || isDirectLoad(LHS)) 
+      && LHS.hasOneUse())
+    return DAG.getNode(PIC16ISD::SUBCC, VTs, LHS, RHS);
+
+  // else convert the first operand to mem.
+  LHS = ConvertToMemOperand (LHS, DAG);
   return DAG.getNode(PIC16ISD::SUBCC, VTs, LHS, RHS);
 }