Be bug compatible with gcc by returning MMX values in RAX.

[oota-llvm.git] / lib / Target / PIC16 / PIC16InstrInfo.cpp

diff --git a/lib/Target/PIC16/PIC16InstrInfo.cpp b/lib/Target/PIC16/PIC16InstrInfo.cpp
index d70ebc649bba4723b920e6b49ad060a90f2e18f2..0066e67209d06559e319cd9d5077e22c1d275637 100644 (file)
--- a/lib/Target/PIC16/PIC16InstrInfo.cpp
+++ b/lib/Target/PIC16/PIC16InstrInfo.cpp
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
+#include <cstdio>
 
 
 using namespace llvm;
@@ -36,7 +37,7 @@ PIC16InstrInfo::PIC16InstrInfo(PIC16TargetMachine &tm)
 /// the source reg along with the FrameIndex of the loaded stack slot.  
 /// If not, return 0.  This predicate must return 0 if the instruction has
 /// any side effects other than storing to the stack slot.
-unsigned PIC16InstrInfo::isStoreToStackSlot(MachineInstr *MI,
+unsigned PIC16InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
                                             int &FrameIndex) const {
   if (MI->getOpcode() == PIC16::movwf 
       && MI->getOperand(0).isReg()
@@ -52,7 +53,7 @@ unsigned PIC16InstrInfo::isStoreToStackSlot(MachineInstr *MI,
 /// the dest reg along with the FrameIndex of the stack slot.  
 /// If not, return 0.  This predicate must return 0 if the instruction has
 /// any side effects other than storing to the stack slot.
-unsigned PIC16InstrInfo::isLoadFromStackSlot(MachineInstr *MI,
+unsigned PIC16InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
                                             int &FrameIndex) const {
   if (MI->getOpcode() == PIC16::movf 
       && MI->getOperand(0).isReg()
@@ -68,6 +69,8 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator I,
                                          unsigned SrcReg, bool isKill, int FI,
                                          const TargetRegisterClass *RC) const {
+  DebugLoc DL = DebugLoc::getUnknownLoc();
+  if (I != MBB.end()) DL = I->getDebugLoc();
 
   const Function *Func = MBB.getParent()->getFunction();
   const std::string FuncName = Func->getName();
@@ -79,7 +82,7 @@ void PIC16InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
   if (RC == PIC16::GPRRegisterClass) {
     //MachineFunction &MF = *MBB.getParent();
     //MachineRegisterInfo &RI = MF.getRegInfo();
-    BuildMI(MBB, I, get(PIC16::movwf))
+    BuildMI(MBB, I, DL, get(PIC16::movwf))
       .addReg(SrcReg, false, false, isKill)
       .addImm(FI)
       .addExternalSymbol(tmpName)
@@ -95,6 +98,8 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
                                           MachineBasicBlock::iterator I,
                                           unsigned DestReg, int FI,
                                           const TargetRegisterClass *RC) const {
+  DebugLoc DL = DebugLoc::getUnknownLoc();
+  if (I != MBB.end()) DL = I->getDebugLoc();
 
   const Function *Func = MBB.getParent()->getFunction();
   const std::string FuncName = Func->getName();
@@ -106,7 +111,7 @@ void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
   if (RC == PIC16::GPRRegisterClass) {
     //MachineFunction &MF = *MBB.getParent();
     //MachineRegisterInfo &RI = MF.getRegInfo();
-    BuildMI(MBB, I, get(PIC16::movf), DestReg)
+    BuildMI(MBB, I, DL, get(PIC16::movf), DestReg)
       .addImm(FI)
       .addExternalSymbol(tmpName)
       .addImm(1); // Emit banksel for it.
@@ -122,22 +127,35 @@ bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
                                    unsigned DestReg, unsigned SrcReg,
                                    const TargetRegisterClass *DestRC,
                                    const TargetRegisterClass *SrcRC) const {
+  DebugLoc DL = DebugLoc::getUnknownLoc();
+  if (I != MBB.end()) DL = I->getDebugLoc();
+
   if (DestRC == PIC16::FSR16RegisterClass) {
-    BuildMI(MBB, I, get(PIC16::copy_fsr), DestReg).addReg(SrcReg);
+    BuildMI(MBB, I, DL, get(PIC16::copy_fsr), DestReg).addReg(SrcReg);
+    return true;
   }
 
-  return true;
+  if (DestRC == PIC16::GPRRegisterClass) {
+    BuildMI(MBB, I, DL, get(PIC16::copy_w), DestReg).addReg(SrcReg);
+    return true;
+  }
+
+  // Not yet supported.
+  return false;
 }
 
 bool PIC16InstrInfo::isMoveInstr(const MachineInstr &MI,
-                                         unsigned &SrcReg,
-                                         unsigned &DestReg) const {
+                                 unsigned &SrcReg, unsigned &DestReg,
+                                 unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
+  SrcSubIdx = DstSubIdx = 0; // No sub-registers.
 
-  if (MI.getOpcode() == PIC16::copy_fsr) {
+  if (MI.getOpcode() == PIC16::copy_fsr
+      || MI.getOpcode() == PIC16::copy_w) {
     DestReg = MI.getOperand(0).getReg();
     SrcReg = MI.getOperand(1).getReg();
     return true;
   }
+
   return false;
 }