Teach tblgen's set theory "sequence" operator to support an optional stride operand.

[oota-llvm.git] / lib / Target / PTX / PTXISelDAGToDAG.cpp

diff --git a/lib/Target/PTX/PTXISelDAGToDAG.cpp b/lib/Target/PTX/PTXISelDAGToDAG.cpp
index d99d49075d89c2626549a7c2c45480a366a83389..5c7ee298f31abd1e420f4370d2127f0d890b8e70 100644 (file)
--- a/lib/Target/PTX/PTXISelDAGToDAG.cpp
+++ b/lib/Target/PTX/PTXISelDAGToDAG.cpp
@@ -12,7 +12,9 @@
 //===----------------------------------------------------------------------===//
 
 #include "PTX.h"
+#include "PTXMachineFunctionInfo.h"
 #include "PTXTargetMachine.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Support/Debug.h"
@@ -90,7 +92,7 @@ SDNode *PTXDAGToDAGISel::SelectBRCOND(SDNode *Node) {
   SDValue Chain  = Node->getOperand(0);
   SDValue Pred   = Node->getOperand(1);
   SDValue Target = Node->getOperand(2); // branch target
-  SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32);
+  SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::Normal, MVT::i32);
   DebugLoc dl = Node->getDebugLoc();
 
   assert(Target.getOpcode()  == ISD::BasicBlock);
@@ -123,11 +125,13 @@ SDNode *PTXDAGToDAGISel::SelectREADPARAM(SDNode *Node) {
     OpCode = PTX::READPARAMI64;
   else if (Type == MVT::f32)
     OpCode = PTX::READPARAMF32;
-  else if (Type == MVT::f64)
+  else {
+    assert(Type == MVT::f64 && "Unexpected type!");
     OpCode = PTX::READPARAMF64;
+  }
 
   SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
-  SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32);
+  SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::None, MVT::i32);
   DebugLoc dl = Node->getDebugLoc();
 
   SDValue Ops[] = { Index, Pred, PredOp, Chain };
@@ -165,7 +169,7 @@ SDNode *PTXDAGToDAGISel::SelectWRITEPARAM(SDNode *Node) {
     llvm_unreachable("Invalid type in SelectWRITEPARAM");
 
   SDValue Pred = CurDAG->getRegister(PTX::NoRegister, MVT::i1);
-  SDValue PredOp = CurDAG->getTargetConstant(PTX::PRED_NORMAL, MVT::i32);
+  SDValue PredOp = CurDAG->getTargetConstant(PTXPredicate::None, MVT::i32);
   DebugLoc dl = Node->getDebugLoc();
 
   SDValue Ops[] = { Value, Pred, PredOp, Chain };
@@ -180,20 +184,14 @@ SDNode *PTXDAGToDAGISel::SelectWRITEPARAM(SDNode *Node) {
 SDNode *PTXDAGToDAGISel::SelectFrameIndex(SDNode *Node) {
   int FI = cast<FrameIndexSDNode>(Node)->getIndex();
   //dbgs() << "Selecting FrameIndex at index " << FI << "\n";
-  SDValue TFI = CurDAG->getTargetFrameIndex(FI, Node->getValueType(0));
+  //SDValue TFI = CurDAG->getTargetFrameIndex(FI, Node->getValueType(0));
 
-  //unsigned OpCode = PTX::LOAD_LOCAL_F32;
+  PTXMachineFunctionInfo *MFI = MF->getInfo<PTXMachineFunctionInfo>();
 
-  //for (SDNode::use_iterator i = Node->use_begin(), e = Node->use_end();
-  //     i != e; ++i) {
-  //  SDNode *Use = *i;
-  //  dbgs() << "USE: ";
-  //  Use->dumpr(CurDAG);
-  //}
+  SDValue FrameSymbol = CurDAG->getTargetExternalSymbol(MFI->getFrameSymbol(FI),
+                                                        Node->getValueType(0));
 
-  return Node;
-  //return CurDAG->getMachineNode(OpCode, Node->getDebugLoc(),
-  //                              Node->getValueType(0), TFI);
+  return FrameSymbol.getNode();
 }
 
 // Match memory operand of the form [reg+reg]