#include "PTXMachineFunctionInfo.h"
#include "PTXRegisterInfo.h"
#include "PTXSubtarget.h"
+#include "llvm/Function.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFunction.h"
using namespace llvm;
-//===----------------------------------------------------------------------===//
-// Calling Convention Implementation
-//===----------------------------------------------------------------------===//
-
-#include "PTXGenCallingConv.inc"
-
//===----------------------------------------------------------------------===//
// TargetLowering Implementation
//===----------------------------------------------------------------------===//
MachineFunction &MF = DAG.getMachineFunction();
const PTXSubtarget& ST = getTargetMachine().getSubtarget<PTXSubtarget>();
PTXMachineFunctionInfo *MFI = MF.getInfo<PTXMachineFunctionInfo>();
+ PTXParamManager &PM = MFI->getParamManager();
switch (CallConv) {
default:
assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) &&
"Kernels cannot take pred operands");
+ unsigned ParamSize = Ins[i].VT.getStoreSizeInBits();
+ unsigned Param = PM.addArgumentParam(ParamSize);
+ const std::string &ParamName = PM.getParamName(Param);
+ SDValue ParamValue = DAG.getTargetExternalSymbol(ParamName.c_str(),
+ MVT::Other);
SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain,
- DAG.getTargetConstant(i, MVT::i32));
+ ParamValue);
InVals.push_back(ArgValue);
-
- // Instead of storing a physical register in our argument list, we just
- // store the total size of the parameter, in bits. The ASM printer
- // knows how to process this.
- MFI->addArgParam(Ins[i].VT.getStoreSizeInBits());
}
}
else {
- // For device functions, we use the PTX calling convention to do register
- // assignments then create CopyFromReg ISDs for the allocated registers
-
- //SmallVector<CCValAssign, 16> ArgLocs;
- //CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), ArgLocs,
- // *DAG.getContext());
-
- //CCInfo.AnalyzeFormalArguments(Ins, CC_PTX);
-
- //for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
-
EVT RegVT = Ins[i].VT;
- TargetRegisterClass* TRC = 0;
- int OpCode;
-
- //assert(VA.isRegLoc() && "CCValAssign must be RegLoc");
-
- // Determine which register class we need
- if (RegVT == MVT::i1) {
- TRC = PTX::RegPredRegisterClass;
- OpCode = PTX::READPARAMPRED;
- }
- else if (RegVT == MVT::i16) {
- TRC = PTX::RegI16RegisterClass;
- OpCode = PTX::READPARAMI16;
- }
- else if (RegVT == MVT::i32) {
- TRC = PTX::RegI32RegisterClass;
- OpCode = PTX::READPARAMI32;
- }
- else if (RegVT == MVT::i64) {
- TRC = PTX::RegI64RegisterClass;
- OpCode = PTX::READPARAMI64;
- }
- else if (RegVT == MVT::f32) {
- TRC = PTX::RegF32RegisterClass;
- OpCode = PTX::READPARAMF32;
- }
- else if (RegVT == MVT::f64) {
- TRC = PTX::RegF64RegisterClass;
- OpCode = PTX::READPARAMF64;
- }
- else {
- llvm_unreachable("Unknown parameter type");
- }
+ TargetRegisterClass* TRC = getRegClassFor(RegVT);
// Use a unique index in the instruction to prevent instruction folding.
// Yes, this is a hack.
SDValue ArgValue = DAG.getNode(PTXISD::READ_PARAM, dl, RegVT, Chain,
Index);
- SDValue Flag = ArgValue.getValue(1);
-
- SDValue Copy = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
- SDValue RegValue = DAG.getRegister(Reg, RegVT);
InVals.push_back(ArgValue);
MFI->addArgReg(Reg);
MachineFunction& MF = DAG.getMachineFunction();
PTXMachineFunctionInfo *MFI = MF.getInfo<PTXMachineFunctionInfo>();
+ PTXParamManager &PM = MFI->getParamManager();
SDValue Flag;
-
- // Even though we could use the .param space for return arguments for
- // device functions if SM >= 2.0 and the number of return arguments is
- // only 1, we just always use registers since this makes the codegen
- // easier.
-
const PTXSubtarget& ST = getTargetMachine().getSubtarget<PTXSubtarget>();
if (ST.useParamSpaceForDeviceArgs()) {
assert(Outs.size() < 2 && "Device functions can return at most one value");
if (Outs.size() == 1) {
- unsigned Size = OutVals[0].getValueType().getSizeInBits();
- SDValue Index = DAG.getTargetConstant(MFI->getNextParam(Size), MVT::i32);
+ unsigned ParamSize = OutVals[0].getValueType().getSizeInBits();
+ unsigned Param = PM.addReturnParam(ParamSize);
+ const std::string &ParamName = PM.getParamName(Param);
+ SDValue ParamValue = DAG.getTargetExternalSymbol(ParamName.c_str(),
+ MVT::Other);
Chain = DAG.getNode(PTXISD::STORE_PARAM, dl, MVT::Other, Chain,
- Index, OutVals[0]);
-
- //Flag = Chain.getValue(1);
- MFI->setRetParamSize(Outs[0].VT.getStoreSizeInBits());
+ ParamValue, OutVals[0]);
}
} else {
- //SmallVector<CCValAssign, 16> RVLocs;
- //CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
- //getTargetMachine(), RVLocs, *DAG.getContext());
-
- //CCInfo.AnalyzeReturn(Outs, RetCC_PTX);
-
- //for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) {
- //CCValAssign& VA = RVLocs[i];
-
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
-
- //assert(VA.isRegLoc() && "CCValAssign must be RegLoc");
-
- //unsigned Reg = VA.getLocReg();
-
EVT RegVT = Outs[i].VT;
TargetRegisterClass* TRC = 0;
unsigned Reg = MF.getRegInfo().createVirtualRegister(TRC);
- //DAG.getMachineFunction().getRegInfo().addLiveOut(Reg);
-
- //Chain = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i], Flag);
- //SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/);
-
- // Guarantee that all emitted copies are stuck together,
- // avoiding something bad
- //Flag = Chain.getValue(1);
-
SDValue Copy = DAG.getCopyToReg(Chain, dl, Reg, OutVals[i]/*, Flag*/);
SDValue OutReg = DAG.getRegister(Reg, RegVT);
Chain = DAG.getNode(PTXISD::WRITE_PARAM, dl, MVT::Other, Copy, OutReg);
- //Flag = Chain.getValue(1);
MFI->addRetReg(Reg);
-
- //MFI->addRetReg(Reg);
}
}
MachineFunction& MF = DAG.getMachineFunction();
PTXMachineFunctionInfo *MFI = MF.getInfo<PTXMachineFunctionInfo>();
+ PTXParamManager &PM = MFI->getParamManager();
assert(getTargetMachine().getSubtarget<PTXSubtarget>().callsAreHandled() &&
"Calls are not handled for the target device");
- // Is there a more "LLVM"-way to create a variable-length array of values?
- SDValue* ops = new SDValue[OutVals.size() + 2];
+ std::vector<SDValue> Ops;
+ // The layout of the ops will be [Chain, #Ins, Ins, Callee, #Outs, Outs]
+ Ops.resize(Outs.size() + Ins.size() + 4);
- ops[0] = Chain;
+ Ops[0] = Chain;
- if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) {
- const GlobalValue *GV = G->getGlobal();
- Callee = DAG.getTargetGlobalAddress(GV, dl, getPointerTy());
- ops[1] = Callee;
- } else {
- assert(false && "Function must be a GlobalAddressSDNode");
- }
+ // Identify the callee function
+ const GlobalValue *GV = cast<GlobalAddressSDNode>(Callee)->getGlobal();
+ assert(cast<Function>(GV)->getCallingConv() == CallingConv::PTX_Device &&
+ "PTX function calls must be to PTX device functions");
+ Callee = DAG.getTargetGlobalAddress(GV, dl, getPointerTy());
+ Ops[Ins.size()+2] = Callee;
+ // Generate STORE_PARAM nodes for each function argument. In PTX, function
+ // arguments are explicitly stored into .param variables and passed as
+ // arguments. There is no register/stack-based calling convention in PTX.
+ Ops[Ins.size()+3] = DAG.getTargetConstant(OutVals.size(), MVT::i32);
for (unsigned i = 0; i != OutVals.size(); ++i) {
unsigned Size = OutVals[i].getValueType().getSizeInBits();
- SDValue Index = DAG.getTargetConstant(MFI->getNextParam(Size), MVT::i32);
+ unsigned Param = PM.addLocalParam(Size);
+ const std::string &ParamName = PM.getParamName(Param);
+ SDValue ParamValue = DAG.getTargetExternalSymbol(ParamName.c_str(),
+ MVT::Other);
Chain = DAG.getNode(PTXISD::STORE_PARAM, dl, MVT::Other, Chain,
- Index, OutVals[i]);
- ops[i+2] = Index;
+ ParamValue, OutVals[i]);
+ Ops[i+Ins.size()+4] = ParamValue;
}
- ops[0] = Chain;
+ std::vector<SDValue> InParams;
+
+ // Generate list of .param variables to hold the return value(s).
+ Ops[1] = DAG.getTargetConstant(Ins.size(), MVT::i32);
+ for (unsigned i = 0; i < Ins.size(); ++i) {
+ unsigned Size = Ins[i].VT.getStoreSizeInBits();
+ unsigned Param = PM.addLocalParam(Size);
+ const std::string &ParamName = PM.getParamName(Param);
+ SDValue ParamValue = DAG.getTargetExternalSymbol(ParamName.c_str(),
+ MVT::Other);
+ Ops[i+2] = ParamValue;
+ InParams.push_back(ParamValue);
+ }
+
+ Ops[0] = Chain;
- Chain = DAG.getNode(PTXISD::CALL, dl, MVT::Other, ops, OutVals.size()+2);
+ // Create the CALL node.
+ Chain = DAG.getNode(PTXISD::CALL, dl, MVT::Other, &Ops[0], Ops.size());
- delete [] ops;
+ // Create the LOAD_PARAM nodes that retrieve the function return value(s).
+ for (unsigned i = 0; i < Ins.size(); ++i) {
+ SDValue Load = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain,
+ InParams[i]);
+ InVals.push_back(Load);
+ }
return Chain;
}
+
+unsigned PTXTargetLowering::getNumRegisters(LLVMContext &Context, EVT VT) {
+ // All arguments consist of one "register," regardless of the type.
+ return 1;
+}
+