Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodes

[oota-llvm.git] / lib / Target / PowerPC / Makefile

diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile
index ef9fff7377b4ff9c9281f1b424b02da8ac1b1fe7..5bc1fcec0c4462c703838346f0faa24bce766537 100644 (file)
--- a/lib/Target/PowerPC/Makefile
+++ b/lib/Target/PowerPC/Makefile
@@ -10,46 +10,39 @@ LEVEL = ../../..
 LIBRARYNAME = powerpc
 include $(LEVEL)/Makefile.common
 
+TARGET = PowerPC
+
 # Make sure that tblgen is run, first thing.
 $(SourceDepend): PowerPCGenRegisterInfo.h.inc PowerPCGenRegisterNames.inc \
                  PowerPCGenRegisterInfo.inc PowerPCGenInstrNames.inc \
-                 PowerPCGenInstrInfo.inc PowerPCGenInstrSelector.inc
+                 PowerPCGenInstrInfo.inc PowerPCGenCodeEmitter.inc
+
+TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \
+          $(SourceDir)/../Target.td
 
-PowerPCGenRegisterNames.inc:: $(SourceDir)/PowerPC.td \
-                           $(SourceDir)/PowerPCReg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td register names with tblgen"
+$(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td register names with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
 
-PowerPCGenRegisterInfo.h.inc:: $(SourceDir)/PowerPC.td \
-                           $(SourceDir)/PowerPCReg.td \
-                           $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td register information header with tblgen"
+$(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td register information header with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
 
-PowerPCGenRegisterInfo.inc:: $(SourceDir)/PowerPC.td \
-                         $(SourceDir)/PowerPCReg.td \
-                         $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td register information implementation with tblgen"
+$(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td register information implementation with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
 
-PowerPCGenInstrNames.inc:: $(SourceDir)/PowerPC.td \
-                       $(SourceDir)/PowerPCInstrs.td \
-                       $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td instruction names with tblgen"
+$(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td instruction names with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
 
-PowerPCGenInstrInfo.inc:: $(SourceDir)/PowerPC.td \
-                      $(SourceDir)/PowerPCInstrs.td \
-                      $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td instruction information with tblgen"
+$(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td instruction information with tblgen"
        $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
 
-PowerPCGenInstrSelector.inc:: $(SourceDir)/PowerPC.td \
-                          $(SourceDir)/PowerPCInstrs.td \
-                          $(SourceDir)/../Target.td $(TBLGEN)
-       @echo "Building PowerPC.td instruction selector with tblgen"
-       $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@
+$(TARGET)GenCodeEmitter.inc:: $(TDFILES) $(TBLGEN)
+       @echo "Building $(TARGET).td code emitter"
+       $(VERB) $(TBLGEN) -I $(SourceDir) $< -gen-emitter -o $@
 
 clean::
        $(VERB) rm -f *.inc